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Added ground terminals

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This commit is contained in:
Gregor Riepl 2020-07-19 22:34:53 +02:00
parent 6473227db9
commit 3507cd1662
4 changed files with 1559 additions and 1099 deletions
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158
poweriface/poweriface-cache.lib
View file

@ -4,8 +4,8 @@ EESchema-LIBRARY Version 2.4
# Connector_AVR-ISP-6
#
DEF Connector_AVR-ISP-6 J 0 40 Y Y 1 F N
F0 "J" 0 400 50 H V L CNN
F1 "Connector_AVR-ISP-6" 0 -300 50 H V L CNN
F0 "J" -250 450 50 H V L CNN
F1 "Connector_AVR-ISP-6" 0 450 50 H V L CNN
F2 "" -250 50 50 V I C CNN
F3 "" -1275 -550 50 H I C CNN
$FPLIST
@ -13,38 +13,69 @@ $FPLIST
Pin?Header*2x03*
$ENDFPLIST
DRAW
S -105 -220 -95 -250 0 1 0 N
S -105 350 -95 320 0 1 0 N
S 250 -95 220 -105 0 1 0 N
S 250 5 220 -5 0 1 0 N
S 250 105 220 95 0 1 0 N
S 250 205 220 195 0 1 0 N
S 250 350 -250 -250 0 1 10 f
X MISO 1 400 200 150 L 50 50 1 1 P
X VCC 2 -100 500 150 D 50 50 1 1 W
X SCK 3 400 0 150 L 50 50 1 1 P
X MOSI 4 400 100 150 L 50 50 1 1 P
X ~RST 5 400 -100 150 L 50 50 1 1 P
X GND 6 -100 -400 150 U 50 50 1 1 W
S -105 -270 -95 -300 0 1 0 N
S -105 400 -95 370 0 1 0 N
S 300 -95 270 -105 0 1 0 N
S 300 5 270 -5 0 1 0 N
S 300 105 270 95 0 1 0 N
S 300 205 270 195 0 1 0 N
S 300 400 -300 -300 0 1 10 f
X MISO 1 400 200 100 L 50 50 1 1 P
X VCC 2 -100 500 100 D 50 50 1 1 P
X SCK 3 400 0 100 L 50 50 1 1 P
X MOSI 4 400 100 100 L 50 50 1 1 P
X ~RST 5 400 -100 100 L 50 50 1 1 P
X GND 6 -100 -400 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_01x02
# Connector_Generic_Conn_01x04
#
DEF Connector_Generic_Conn_01x02 J 0 40 Y N 1 F N
F0 "J" 0 100 50 H V C CNN
F1 "Connector_Generic_Conn_01x02" 0 -200 50 H V C CNN
DEF Connector_Generic_Conn_01x04 J 0 40 Y N 1 F N
F0 "J" 0 200 50 H V C CNN
F1 "Connector_Generic_Conn_01x04" 0 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 50 50 -150 1 1 10 f
X Pin_1 1 -200 0 150 R 50 50 1 1 P
X Pin_2 2 -200 -100 150 R 50 50 1 1 P
S -50 105 0 95 1 1 6 N
S -50 150 50 -250 1 1 10 f
X Pin_1 1 -200 100 150 R 50 50 1 1 P
X Pin_2 2 -200 0 150 R 50 50 1 1 P
X Pin_3 3 -200 -100 150 R 50 50 1 1 P
X Pin_4 4 -200 -200 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_01x06
#
DEF Connector_Generic_Conn_01x06 J 0 40 Y N 1 F N
F0 "J" 0 300 50 H V C CNN
F1 "Connector_Generic_Conn_01x06" 0 -400 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 250 50 -350 1 1 10 f
X Pin_1 1 -200 200 150 R 50 50 1 1 P
X Pin_2 2 -200 100 150 R 50 50 1 1 P
X Pin_3 3 -200 0 150 R 50 50 1 1 P
X Pin_4 4 -200 -100 150 R 50 50 1 1 P
X Pin_5 5 -200 -200 150 R 50 50 1 1 P
X Pin_6 6 -200 -300 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
@ -66,29 +97,6 @@ X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_CP
#
DEF Device_CP C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_CP" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
CP_*
$ENDFPLIST
DRAW
S -90 20 -90 40 0 1 0 N
S -90 20 90 20 0 1 0 N
S 90 -20 -90 -40 0 1 0 F
S 90 40 -90 40 0 1 0 N
S 90 40 90 20 0 1 0 N
P 2 0 1 0 -70 90 -30 90 N
P 2 0 1 0 -50 110 -50 70 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_Crystal
#
DEF Device_Crystal Y 0 40 N N 1 F N
@ -117,6 +125,12 @@ F0 "JP" 0 80 50 H V C CNN
F1 "Device_Jumper_NO_Small" 10 -60 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SolderJumper*Open*
Jumper*
TestPoint*2Pads*
TestPoint*Bridge*
$ENDFPLIST
DRAW
C -40 0 20 0 1 0 N
C 40 0 20 0 1 0 N
@ -178,38 +192,38 @@ $FPLIST
$ENDFPLIST
DRAW
S -500 -1700 500 1700 0 1 10 f
X PD2 1 600 -500 100 L 50 50 1 1 T
X XTAL1/PE1 10 600 -1300 100 L 50 50 1 1 T
X XTAL2/PE2 11 600 -1400 100 L 50 50 1 1 T
X PD4 12 600 -700 100 L 50 50 1 1 T
X PD5 13 600 -800 100 L 50 50 1 1 T
X PD6 14 600 -900 100 L 50 50 1 1 T
X PD7 15 600 -1000 100 L 50 50 1 1 T
X PB2 16 600 1300 100 L 50 50 1 1 T
X PC4 17 600 200 100 L 50 50 1 1 T
X PC5 18 600 100 100 L 50 50 1 1 T
X PD2 1 600 -500 100 L 50 50 1 1 B
X XTAL1/PE1 10 600 -1300 100 L 50 50 1 1 B
X XTAL2/PE2 11 600 -1400 100 L 50 50 1 1 B
X PD4 12 600 -700 100 L 50 50 1 1 B
X PD5 13 600 -800 100 L 50 50 1 1 B
X PD6 14 600 -900 100 L 50 50 1 1 B
X PD7 15 600 -1000 100 L 50 50 1 1 B
X PB2 16 600 1300 100 L 50 50 1 1 B
X PC4 17 600 200 100 L 50 50 1 1 B
X PC5 18 600 100 100 L 50 50 1 1 B
X AVCC 19 100 1800 100 D 50 50 1 1 W
X PD3 2 600 -600 100 L 50 50 1 1 T
X PD3 2 600 -600 100 L 50 50 1 1 B
X AGND 20 100 -1800 100 U 50 50 1 1 W
X AREF/ISRC 21 -600 1500 100 R 50 50 1 1 P
X PC6 22 600 0 100 L 50 50 1 1 T
X PB3 23 600 1200 100 L 50 50 1 1 T
X PB4 24 600 1100 100 L 50 50 1 1 T
X PC7 25 600 -100 100 L 50 50 1 1 T
X PB5 26 600 1000 100 L 50 50 1 1 T
X PB6 27 600 900 100 L 50 50 1 1 T
X PB7 28 600 800 100 L 50 50 1 1 T
X PD0 29 600 -300 100 L 50 50 1 1 T
X PC1 3 600 500 100 L 50 50 1 1 T
X PC0 30 600 600 100 L 50 50 1 1 T
X ~RESET~/PE0 31 600 -1200 100 L 50 50 1 1 T
X PD1 32 600 -400 100 L 50 50 1 1 T
X PC6 22 600 0 100 L 50 50 1 1 B
X PB3 23 600 1200 100 L 50 50 1 1 B
X PB4 24 600 1100 100 L 50 50 1 1 B
X PC7 25 600 -100 100 L 50 50 1 1 B
X PB5 26 600 1000 100 L 50 50 1 1 B
X PB6 27 600 900 100 L 50 50 1 1 B
X PB7 28 600 800 100 L 50 50 1 1 B
X PD0 29 600 -300 100 L 50 50 1 1 B
X PC1 3 600 500 100 L 50 50 1 1 B
X PC0 30 600 600 100 L 50 50 1 1 B
X ~RESET~/PE0 31 600 -1200 100 L 50 50 1 1 B
X PD1 32 600 -400 100 L 50 50 1 1 B
X VCC 4 0 1800 100 D 50 50 1 1 W
X GND 5 0 -1800 100 U 50 50 1 1 W
X PC2 6 600 400 100 L 50 50 1 1 T
X PC3 7 600 300 100 L 50 50 1 1 T
X PB0 8 600 1500 100 L 50 50 1 1 T
X PB1 9 600 1400 100 L 50 50 1 1 T
X PC2 6 600 400 100 L 50 50 1 1 B
X PC3 7 600 300 100 L 50 50 1 1 B
X PB0 8 600 1500 100 L 50 50 1 1 B
X PB1 9 600 1400 100 L 50 50 1 1 B
ENDDRAW
ENDDEF
#

2117
poweriface/poweriface.kicad_pcb
View file

File diff suppressed because it is too large Load diff

266
poweriface/poweriface.pro
View file

@ -1,29 +1,10 @@
update=22/05/2015 07:44:53
update=Wed 12 Feb 2020 20:11:11 CET
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
@ -31,3 +12,248 @@ NetIExt=net
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=poweriface.net
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
ViaDiameter1=0.8
ViaDrill1=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.15
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.15
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.051
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=CAN
Clearance=0.15
TrackWidth=0.2
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.15
dPairViaGap=0.25

117
poweriface/poweriface.sch
View file

@ -1,13 +1,12 @@
EESchema Schematic File Version 4
LIBS:poweriface-cache
EELAYER 26 0
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title "Matemat Power Board CAN Interface"
Date "2019-04-05"
Rev "1"
Date "2020-02-12"
Rev "2"
Comp "CCC Basel"
Comment1 ""
Comment2 ""
@ -70,28 +69,6 @@ F 3 "http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8209-8-bit%20AVR%20AT
1 0 0 -1
$EndComp
$Comp
L Connector_Generic:Conn_01x02 J2
U 1 1 5CA53A5C
P 8400 4400
F 0 "J2" H 8479 4392 50 0000 L CNN
F 1 "CAN In" H 8479 4301 50 0000 L CNN
F 2 "TerminalBlock_TE-Connectivity:TerminalBlock_TE_282834-2_1x02_P2.54mm_Horizontal" H 8400 4400 50 0001 C CNN
F 3 "~" H 8400 4400 50 0001 C CNN
1 8400 4400
1 0 0 -1
$EndComp
$Comp
L Connector_Generic:Conn_01x02 J3
U 1 1 5CA53AD4
P 8400 4800
F 0 "J3" H 8479 4792 50 0000 L CNN
F 1 "CAN Out" H 8479 4701 50 0000 L CNN
F 2 "TerminalBlock_TE-Connectivity:TerminalBlock_TE_282834-2_1x02_P2.54mm_Horizontal" H 8400 4800 50 0001 C CNN
F 3 "~" H 8400 4800 50 0001 C CNN
1 8400 4800
1 0 0 -1
$EndComp
$Comp
L Device:Crystal Y1
U 1 1 5CA53BA3
P 4800 5450
@ -124,14 +101,10 @@ F 3 "~" H 5250 5700 50 0001 C CNN
1 5250 5700
0 1 1 0
$EndComp
Text Label 8200 4600 2 50 ~ 0
CAN_N
Text Label 8200 4500 2 50 ~ 0
CAN_N
Text Label 8200 4400 2 50 ~ 0
CAN_P
Text Label 8200 4800 2 50 ~ 0
CAN_P
Text Label 8200 4900 2 50 ~ 0
CAN_N
Text Label 7350 4700 0 50 ~ 0
CAN_N
Text Label 7350 4500 0 50 ~ 0
@ -285,17 +258,6 @@ Text Label 6350 4500 2 50 ~ 0
RXCAN
Text Label 6350 4400 2 50 ~ 0
TXCAN
$Comp
L Device:CP C3
U 1 1 5CA54AD7
P 6800 5650
F 0 "C3" H 6918 5696 50 0000 L CNN
F 1 "10u" H 6918 5605 50 0000 L CNN
F 2 "Capacitor_THT:CP_Radial_D5.0mm_P2.00mm" H 6838 5500 50 0001 C CNN
F 3 "~" H 6800 5650 50 0001 C CNN
1 6800 5650
1 0 0 -1
$EndComp
Wire Wire Line
7200 5500 6800 5500
Wire Wire Line
@ -475,7 +437,7 @@ L Device:R R7
U 1 1 5CA5C44B
P 6200 4950
F 0 "R7" V 6407 4950 50 0000 C CNN
F 1 "0" V 6316 4950 50 0000 C CNN
F 1 "DNP" V 6316 4950 50 0000 C CNN
F 2 "Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder" V 6130 4950 50 0001 C CNN
F 3 "~" H 6200 4950 50 0001 C CNN
1 6200 4950
@ -488,4 +450,71 @@ Text Label 6050 4950 2 50 ~ 0
HISPEED
Text Label 4550 4900 0 50 ~ 0
HISPEED
$Comp
L Device:C C3
U 1 1 5E445A5C
P 6800 5650
F 0 "C3" H 6915 5696 50 0000 L CNN
F 1 "10u" H 6915 5605 50 0000 L CNN
F 2 "Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder" H 6838 5500 50 0001 C CNN
F 3 "~" H 6800 5650 50 0001 C CNN
1 6800 5650
1 0 0 -1
$EndComp
$Comp
L Connector_Generic:Conn_01x04 J2
U 1 1 5CA53A5C
P 8400 4400
F 0 "J2" H 8479 4392 50 0000 L CNN
F 1 "CAN" H 8479 4301 50 0000 L CNN
F 2 "TerminalBlock_TE-Connectivity:TerminalBlock_TE_282834-4_1x04_P2.54mm_Horizontal" H 8400 4400 50 0001 C CNN
F 3 "~" H 8400 4400 50 0001 C CNN
1 8400 4400
1 0 0 -1
$EndComp
Text Label 8200 4300 2 50 ~ 0
CAN_N
Text Label 8200 4400 2 50 ~ 0
CAN_P
$Comp
L Connector_Generic:Conn_01x06 J3
U 1 1 5F01B6DF
P 9200 4400
F 0 "J3" H 9280 4392 50 0000 L CNN
F 1 "CAN_SHIELD" H 9280 4301 50 0000 L CNN
F 2 "TerminalBlock_TE-Connectivity:TerminalBlock_TE_282834-6_1x06_P2.54mm_Horizontal" H 9200 4400 50 0001 C CNN
F 3 "~" H 9200 4400 50 0001 C CNN
1 9200 4400
1 0 0 -1
$EndComp
Text Label 9000 4600 2 50 ~ 0
CAN_N
Text Label 9000 4500 2 50 ~ 0
CAN_P
Text Label 9000 4300 2 50 ~ 0
CAN_N
Text Label 9000 4400 2 50 ~ 0
CAN_P
$Comp
L power:GND #PWR0101
U 1 1 5F01D002
P 9000 4700
F 0 "#PWR0101" H 9000 4450 50 0001 C CNN
F 1 "GND" H 9005 4527 50 0000 C CNN
F 2 "" H 9000 4700 50 0001 C CNN
F 3 "" H 9000 4700 50 0001 C CNN
1 9000 4700
0 1 1 0
$EndComp
$Comp
L power:GND #PWR0102
U 1 1 5F01D90A
P 9000 4200
F 0 "#PWR0102" H 9000 3950 50 0001 C CNN
F 1 "GND" H 9005 4027 50 0000 C CNN
F 2 "" H 9000 4200 50 0001 C CNN
F 3 "" H 9000 4200 50 0001 C CNN
1 9000 4200
0 1 1 0
$EndComp
$EndSCHEMATC