Moved circuit diagrams into separate directories

Updated module library paths
This commit is contained in:
Gregor Riepl 2015-09-08 17:57:23 +02:00
parent debf95fbaf
commit 6026456fab
6 changed files with 323 additions and 8 deletions

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@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Mon 06 Apr 2015 12:28:20 CEST
EESchema-LIBRARY Version 2.3 Date: Tue 08 Sep 2015 17:53:06 CEST
#encoding utf-8
#
# +12V

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@ -1,4 +1,4 @@
update=Mon 06 Apr 2015 14:29:59 CEST
update=Tue 08 Sep 2015 17:59:21 CEST
last_client=pcbnew
[cvpcb]
version=1
@ -7,7 +7,7 @@ NetIExt=net
EquName1=devcms
[eeschema]
version=1
LibDir=
LibDir=..
NetFmtName=
RptD_X=0
RptD_Y=100
@ -65,7 +65,7 @@ DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.150000000000
ModuleOutlineThickness=0.050000000000
[pcbnew/libraries]
LibDir=
LibDir=..
LibName1=sockets
LibName2=connect
LibName3=discret

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@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Wed 01 Apr 2015 19:27:27 CEST
EESchema-LIBRARY Version 2.3 Date: Tue 08 Sep 2015 17:54:41 CEST
#encoding utf-8
#
# 74LS04

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