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Moved circuit diagrams into separate directories

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Updated module library paths
This commit is contained in:
Gregor Riepl 2015-09-08 17:57:23 +02:00
parent debf95fbaf
commit 6026456fab
6 changed files with 323 additions and 8 deletions
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2
control-cache.lib → control/control-cache.lib
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@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Mon 06 Apr 2015 12:28:20 CEST EESchema-LIBRARY Version 2.3 Date: Tue 08 Sep 2015 17:53:06 CEST
#encoding utf-8 #encoding utf-8
# #
# +12V # +12V

0
control.kicad_pcb → control/control.kicad_pcb
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6
control.pro → control/control.pro
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@ -1,4 +1,4 @@
update=Mon 06 Apr 2015 14:29:59 CEST update=Tue 08 Sep 2015 17:59:21 CEST
last_client=pcbnew last_client=pcbnew
[cvpcb] [cvpcb]
version=1 version=1
@ -7,7 +7,7 @@ NetIExt=net
EquName1=devcms EquName1=devcms
[eeschema] [eeschema]
version=1 version=1
LibDir= LibDir=..
NetFmtName= NetFmtName=
RptD_X=0 RptD_X=0
RptD_Y=100 RptD_Y=100
@ -65,7 +65,7 @@ DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.150000000000 BoardOutlineThickness=0.150000000000
ModuleOutlineThickness=0.050000000000 ModuleOutlineThickness=0.050000000000
[pcbnew/libraries] [pcbnew/libraries]
LibDir= LibDir=..
LibName1=sockets LibName1=sockets
LibName2=connect LibName2=connect
LibName3=discret LibName3=discret

0
control.sch → control/control.sch
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2
power-cache.lib → power/power-cache.lib
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@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Wed 01 Apr 2015 19:27:27 CEST EESchema-LIBRARY Version 2.3 Date: Tue 08 Sep 2015 17:54:41 CEST
#encoding utf-8 #encoding utf-8
# #
# 74LS04 # 74LS04

321
power.sch → power/power.sch
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