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Fixed a number of errata in first control board revision

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Swapped USB B port D+ and D- lines
Swapped UART0 RX and TX lines
Changed resistor values
Added UART0 RX and TX LEDs
Conntected USB sleep control line
This commit is contained in:
Gregor Riepl 2015-04-02 18:17:12 +02:00
parent 7781096ae9
commit 6db273f22e
2 changed files with 465 additions and 362 deletions
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2
control-cache.lib
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@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Sun 21 Apr 2013 21:15:50 CEST
EESchema-LIBRARY Version 2.3 Date: Tue 24 Mar 2015 22:59:59 CET
#encoding utf-8
#
# +12V

825
control.sch
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