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Rewrote VFD pin access functions

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This commit is contained in:
Gregor Riepl 2021-04-22 00:36:43 +02:00
parent c06851e824
commit 8b4eb9e938
1 changed files with 71 additions and 38 deletions
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109
display/firmware/display.c
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@ -24,6 +24,60 @@ void display_init() {
display_wait_ready(); display_wait_ready();
} }
static void display_set_rs(bool on) {
if (on) {
PORTC |= _BV(PC5);
} else {
PORTC &= ~_BV(PC5);
}
}
static void display_set_rw(bool on) {
if (on) {
PORTC |= _BV(PC6);
} else {
PORTC &= ~_BV(PC6);
}
}
static void display_set_e(bool on) {
if (on) {
PORTC |= _BV(PC7);
} else {
PORTC &= ~_BV(PC7);
}
}
static void display_set_data(uint8_t data) {
uint8_t datab = PORTB & ~(_BV(PB0) | _BV(PB1) | _BV(PB7));
uint8_t datad = PORTD & ~(_BV(PD0) | _BV(PD1) | _BV(PD5) | _BV(PD6) | _BV(PD7));
datab |= (data & _BV(2)) ? _BV(PB0) : 0;
datab |= (data & _BV(3)) ? _BV(PB1) : 0;
datab |= (data & _BV(4)) ? _BV(PB7) : 0;
datad |= (data & _BV(0)) ? _BV(PD0) : 0;
datad |= (data & _BV(1)) ? _BV(PD1) : 0;
datad |= (data & _BV(5)) ? _BV(PD5) : 0;
datad |= (data & _BV(6)) ? _BV(PD6) : 0;
datad |= (data & _BV(7)) ? _BV(PD7) : 0;
PORTB = datab;
PORTD = datad;
}
static uint8_t display_get_data() {
uint8_t datab = PINB;
uint8_t datad = PIND;
uint8_t data = 0;
data |= (datad & _BV(PD0)) ? _BV(0) : 0;
data |= (datad & _BV(PD1)) ? _BV(1) : 0;
data |= (datad & _BV(PD5)) ? _BV(5) : 0;
data |= (datad & _BV(PD6)) ? _BV(6) : 0;
data |= (datad & _BV(PD7)) ? _BV(7) : 0;
data |= (datab & _BV(PB0)) ? _BV(2) : 0;
data |= (datab & _BV(PB1)) ? _BV(3) : 0;
data |= (datab & _BV(PB7)) ? _BV(4) : 0;
return data;
}
uint8_t display_read_ir() { uint8_t display_read_ir() {
// switch PD to input // switch PD to input
DDRB &= ~(_BV(PB0) | _BV(PB1) | _BV(PB7)); DDRB &= ~(_BV(PB0) | _BV(PB1) | _BV(PB7));
@ -93,61 +147,40 @@ uint8_t display_read_dr() {
} }
void display_write_ir(uint8_t data) { void display_write_ir(uint8_t data) {
// reassemble data // RS=0 (IR) RW=0 (write)
uint8_t datab = 0; display_set_rs(false);
uint8_t datad = 0; display_set_rw(false);
datad |= (data & _BV(0)) ? _BV(PD0) : 0;
datad |= (data & _BV(1)) ? _BV(PD1) : 0;
datad |= (data & _BV(5)) ? _BV(PD5) : 0;
datad |= (data & _BV(6)) ? _BV(PD6) : 0;
datad |= (data & _BV(7)) ? _BV(PD7) : 0;
datab |= (data & _BV(2)) ? _BV(PB0) : 0;
datab |= (data & _BV(3)) ? _BV(PB1) : 0;
datab |= (data & _BV(4)) ? _BV(PB7) : 0;
// E=0 (enable/clock) RS=0 (IR) RW=0 (write)
PORTC &= ~(_BV(PC5) | _BV(PC6) | _BV(PC7));
_delay_us(0.23); _delay_us(0.23);
// E=1 (enable/clock) // E=1 (enable/clock)
PORTC |= _BV(PC7); display_set_e(true);
// send data // send data
PORTB = datab; display_set_data(data);
PORTD = datad;
_delay_us(0.23); _delay_us(0.23);
// E=0 (enable/clock) // E=0 (enable/clock)
PORTC &= ~_BV(PC7); display_set_e(false);
_delay_us(0.01); _delay_us(0.01);
// reset to idle // reset to idle
PORTC = _BV(PC6) | _BV(PC7); display_set_rs(true);
PORTD = 0x00; display_set_rw(true);
display_set_data(0);
} }
void display_write_dr(uint8_t data) { void display_write_dr(uint8_t data) {
// reassemble data // RS=1 (DR) RW=0 (write)
uint8_t datab = 0; display_set_rs(true);
uint8_t datad = 0; display_set_rw(false);
datad |= (data & _BV(0)) ? _BV(PD0) : 0;
datad |= (data & _BV(1)) ? _BV(PD1) : 0;
datad |= (data & _BV(5)) ? _BV(PD5) : 0;
datad |= (data & _BV(6)) ? _BV(PD6) : 0;
datad |= (data & _BV(7)) ? _BV(PD7) : 0;
datab |= (data & _BV(2)) ? _BV(PB0) : 0;
datab |= (data & _BV(3)) ? _BV(PB1) : 0;
datab |= (data & _BV(4)) ? _BV(PB7) : 0;
// E=0 (enable/clock) RS=1 (IR) RW=0 (write)
PORTC = (PORTC & ~(_BV(PC6) | _BV(PC7))) | _BV(PC5);
_delay_us(0.23); _delay_us(0.23);
// E=1 (enable/clock) // E=1 (enable/clock)
PORTC |= _BV(PC7); display_set_e(true);
// send data // send data
PORTB = datab; display_set_data(data);
PORTD = datad;
_delay_us(0.23); _delay_us(0.23);
// E=0 (enable/clock) // E=0 (enable/clock)
PORTC &= ~_BV(PC7); display_set_e(false);
_delay_us(0.01); _delay_us(0.01);
// reset to idle // reset to idle
PORTC = _BV(PC6) | _BV(PC7); display_set_rw(true);
PORTD = 0x00; display_set_data(0);
} }