Gregor Riepl
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fe7106cfa1
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Rewrote display pinout to match patched PCB
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2021-04-21 23:23:07 +02:00 |
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Gregor Riepl
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c5b29bdee2
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Moved VFD buttons to separate module
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2021-04-21 23:22:48 +02:00 |
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Gregor Riepl
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ec2e7ae044
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Flipped VFD board
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2021-04-19 22:10:20 +02:00 |
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Gregor Riepl
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cf6a82c56f
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Fixed orientation of VFD connector
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2021-04-19 22:06:25 +02:00 |
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Gregor Riepl
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2d03684b6d
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Added separate display firmware driver
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2021-03-11 12:47:38 +01:00 |
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Gregor Riepl
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e75eca4908
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Fixed display AT32M1 ISP pinout and rewired GPIOs
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2021-03-11 12:47:03 +01:00 |
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Gregor Riepl
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a2a0ab6865
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Refactored display intf routines into module
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2021-03-09 12:09:48 +01:00 |
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Gregor Riepl
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6b58fc2738
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Add deadline on display status read
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2021-03-09 11:52:38 +01:00 |
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Gregor Riepl
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a35be5f149
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Implemented display register access
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2021-03-09 01:33:22 +01:00 |
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Gregor Riepl
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c1053d1963
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Added display firmware skeleton
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2021-03-06 13:21:23 +01:00 |
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Gregor Riepl
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9ca51d3e3b
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Added VFD display interface
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2021-03-04 03:02:39 +01:00 |
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