178 lines
5 KiB
C
178 lines
5 KiB
C
#include <avr/io.h>
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#include <util/delay.h>
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#include "display.h"
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// maximum wait time until busy should be deasserted
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// bail out if it takes longer than that
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// unit: 10us (roughly)
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// range: 0..255
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#define DISPLAY_WAIT_MAX_10US 100
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void display_init() {
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// PC5, PC6, PC7: output (VFD RS, RW, E), RS=0, RW=1, E=1
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// PB0, PB1, PB7, PD0, PD1, PD5, PD6, PD7: output (VFD DB) - can be switched to input (pullup not needed)
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PORTB &= ~(_BV(PB0) | _BV(PB1) | _BV(PB7));
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DDRB |= _BV(PB0) | _BV(PB1) | _BV(PB7);
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PORTC |= _BV(PC6) | _BV(PC7);
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DDRC |= _BV(PC5) | _BV(PC6) | _BV(PC7);
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PORTD &= ~(_BV(PD0) | _BV(PD1) | _BV(PD5) | _BV(PD6) | _BV(PD7));
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DDRD |= _BV(PD0) | _BV(PD1) | _BV(PD5) | _BV(PD6) | _BV(PD7);
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display_wait_ready();
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// initialize display: 8 bit, 2 lines, 50% brightness
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display_write_ir(0x3c);
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display_wait_ready();
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}
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uint8_t display_read_ir() {
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// switch PD to input
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DDRB &= ~(_BV(PB0) | _BV(PB1) | _BV(PB7));
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DDRD &= ~(_BV(PD0) | _BV(PD1) | _BV(PD5) | _BV(PD6) | _BV(PD7));
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// E=0 (enable/clock) RS=0 (IR) RW=1 (read)
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PORTC = (PORTC & ~(_BV(PC5) | _BV(PC7))) | _BV(PC6);
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_delay_us(0.23);
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// E=1 (enable/clock)
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PORTC |= _BV(PC7);
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_delay_us(0.16);
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// read inputs
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uint8_t datab = PINB;
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uint8_t datad = PIND;
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_delay_us(0.23 - 0.16);
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// E=0 (enable/clock)
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PORTC &= ~_BV(PC7);
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_delay_us(0.01);
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// reset to idle / output
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PORTC = _BV(PC6) | _BV(PC7);
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DDRB |= _BV(PB0) | _BV(PB1) | _BV(PB7);
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DDRD |= _BV(PD0) | _BV(PD1) | _BV(PD5) | _BV(PD6) | _BV(PD7);
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// reassemble data
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uint8_t data = 0;
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data |= (datad & _BV(PD0)) ? _BV(0) : 0;
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data |= (datad & _BV(PD1)) ? _BV(1) : 0;
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data |= (datad & _BV(PD5)) ? _BV(5) : 0;
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data |= (datad & _BV(PD6)) ? _BV(6) : 0;
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data |= (datad & _BV(PD7)) ? _BV(7) : 0;
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data |= (datab & _BV(PB0)) ? _BV(2) : 0;
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data |= (datab & _BV(PB1)) ? _BV(3) : 0;
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data |= (datab & _BV(PB7)) ? _BV(4) : 0;
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return data;
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}
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uint8_t display_read_dr() {
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// switch PD to input
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DDRB &= ~(_BV(PB0) | _BV(PB1) | _BV(PB7));
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DDRD &= ~(_BV(PD0) | _BV(PD1) | _BV(PD5) | _BV(PD6) | _BV(PD7));
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// E=0 (enable/clock) RS=1 (IR) RW=1 (read)
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PORTC = (PORTC & ~_BV(PC7)) | (_BV(PC5) | _BV(PC6));
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_delay_us(0.23);
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// E=1 (enable/clock)
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PORTC |= _BV(PC7);
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_delay_us(0.16);
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// read inputs
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uint8_t datab = PINB;
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uint8_t datad = PIND;
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_delay_us(0.23 - 0.16);
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// E=0 (enable/clock)
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PORTC &= ~_BV(PC7);
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_delay_us(0.01);
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// reset to idle / output
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PORTC = _BV(PC6) | _BV(PC7);
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DDRB |= _BV(PB0) | _BV(PB1) | _BV(PB7);
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DDRD |= _BV(PD0) | _BV(PD1) | _BV(PD5) | _BV(PD6) | _BV(PD7);
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// reassemble data
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uint8_t data = 0;
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data |= (datad & _BV(PD0)) ? _BV(0) : 0;
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data |= (datad & _BV(PD1)) ? _BV(1) : 0;
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data |= (datad & _BV(PD5)) ? _BV(5) : 0;
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data |= (datad & _BV(PD6)) ? _BV(6) : 0;
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data |= (datad & _BV(PD7)) ? _BV(7) : 0;
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data |= (datab & _BV(PB0)) ? _BV(2) : 0;
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data |= (datab & _BV(PB1)) ? _BV(3) : 0;
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data |= (datab & _BV(PB7)) ? _BV(4) : 0;
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return data;
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}
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void display_write_ir(uint8_t data) {
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// reassemble data
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uint8_t datab = 0;
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uint8_t datad = 0;
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datad |= (data & _BV(0)) ? _BV(PD0) : 0;
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datad |= (data & _BV(1)) ? _BV(PD1) : 0;
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datad |= (data & _BV(5)) ? _BV(PD5) : 0;
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datad |= (data & _BV(6)) ? _BV(PD6) : 0;
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datad |= (data & _BV(7)) ? _BV(PD7) : 0;
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datab |= (data & _BV(2)) ? _BV(PB0) : 0;
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datab |= (data & _BV(3)) ? _BV(PB1) : 0;
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datab |= (data & _BV(4)) ? _BV(PB7) : 0;
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// E=0 (enable/clock) RS=0 (IR) RW=0 (write)
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PORTC &= ~(_BV(PC5) | _BV(PC6) | _BV(PC7));
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_delay_us(0.23);
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// E=1 (enable/clock)
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PORTC |= _BV(PC7);
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// send data
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PORTB = datab;
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PORTD = datad;
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_delay_us(0.23);
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// E=0 (enable/clock)
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PORTC &= ~_BV(PC7);
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_delay_us(0.01);
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// reset to idle
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PORTC = _BV(PC6) | _BV(PC7);
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PORTD = 0x00;
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}
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void display_write_dr(uint8_t data) {
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// reassemble data
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uint8_t datab = 0;
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uint8_t datad = 0;
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datad |= (data & _BV(0)) ? _BV(PD0) : 0;
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datad |= (data & _BV(1)) ? _BV(PD1) : 0;
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datad |= (data & _BV(5)) ? _BV(PD5) : 0;
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datad |= (data & _BV(6)) ? _BV(PD6) : 0;
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datad |= (data & _BV(7)) ? _BV(PD7) : 0;
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datab |= (data & _BV(2)) ? _BV(PB0) : 0;
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datab |= (data & _BV(3)) ? _BV(PB1) : 0;
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datab |= (data & _BV(4)) ? _BV(PB7) : 0;
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// E=0 (enable/clock) RS=1 (IR) RW=0 (write)
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PORTC = (PORTC & ~(_BV(PC6) | _BV(PC7))) | _BV(PC5);
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_delay_us(0.23);
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// E=1 (enable/clock)
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PORTC |= _BV(PC7);
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// send data
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PORTB = datab;
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PORTD = datad;
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_delay_us(0.23);
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// E=0 (enable/clock)
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PORTC &= ~_BV(PC7);
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_delay_us(0.01);
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// reset to idle
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PORTC = _BV(PC6) | _BV(PC7);
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PORTD = 0x00;
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}
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bool display_wait_ready() {
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// FIXME hack to avoid read mode
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_delay_ms(1);
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return true;
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// FIXME
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// if the busy flag never goes high, we'll run into a deadlock here.
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// let's put a deadline on the wait loop.
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for (uint8_t i = 0; i < DISPLAY_WAIT_MAX_10US; i++) {
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// read_ir() takes about 500ns
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if (display_read_ir() & _BV(7)) return true;
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// wait 10us until the next status read
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_delay_us(10 - 0.5);
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}
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return false;
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}
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void display_write(uint8_t command, const uint8_t *data, uint8_t length) {
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if (display_wait_ready()) {
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display_write_ir(command);
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for (uint8_t i = 0; i < length; i++) {
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display_write_dr(data[i]);
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}
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}
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}
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