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feat: save 2mA by idling the DAC at logical 0 rather than amplitude 0

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s3lph 2023-05-07 04:57:50 +02:00
parent f6fbc29fde
commit 78a9dfb99a
Signed by: s3lph
GPG key ID: 0AA29A52FB33CFB5
2 changed files with 6 additions and 2 deletions
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4
create_sinus_tables.py
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@ -62,7 +62,9 @@ void sendZero(uint32_t *us, uint8_t *phaseShift) {{
}}
void setZero() {{
OUT_PORT = (pgm_read_byte(&SINUS2200[0]) >> 4) | (OUT_PORT & 0xf0);
// Setting all to LOW rather than what 0b1000000 (which would be a signal amplitude of 0) saves about 2mA @ R = 550 ohms
//OUT_PORT = (pgm_read_byte(&SINUS2200[0]) >> 4) | (OUT_PORT & 0xf0);
OUT_PORT &= 0xf0;
}}
''')

4
include/afsk_sinus.hpp
View file

@ -37,6 +37,8 @@ void sendZero(uint32_t *us, uint8_t *phaseShift) {
}
void setZero() {
OUT_PORT = (pgm_read_byte(&SINUS2200[0]) >> 4) | (OUT_PORT & 0xf0);
// Setting all to LOW rather than what 0b1000000 (which would be a signal amplitude of 0) saves about 2mA @ R = 550 ohms
//OUT_PORT = (pgm_read_byte(&SINUS2200[0]) >> 4) | (OUT_PORT & 0xf0);
OUT_PORT &= 0xf0;
}