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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(kicad_pcb
(version 20240108)
(generator "pcbnew")
(generator_version "8.0")
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(legacy_teardrops no)
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(paper "A4")
(title_block
(title "CBM PET SRAM Expansion")
(date "2024-03-10")
(rev "4")
(company "CCC Basel")
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(39 "F.Mask" user)
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(41 "Cmts.User" user "User.Comments")
(42 "Eco1.User" user "User.Eco1")
(43 "Eco2.User" user "User.Eco2")
(44 "Edge.Cuts" user)
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(46 "B.CrtYd" user "B.Courtyard")
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(tags "resistor")
(property "Reference" "R3"
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(at 0 -1.8 180)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(footprint "Capacitor_SMD:C_0805_2012Metric"
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(layer "F.Cu")
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "9c809853-6e33-49f2-9057-54c2d28b8cfa")
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(layer "F.Fab")
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(layer "F.Fab")
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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(path "/d18a9aa6-8f58-4106-aeb4-921027adec28")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(sheetname "Root")
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start -0.261252 -0.735)
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(stroke
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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2024-09-04 07:33:55 +02:00
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2024-09-06 09:21:51 +02:00
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2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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2024-09-04 07:33:55 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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(remove_unused_layers no)
(net 17 "/~{SEL8}")
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2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
(start 197.136 82.556)
(end 205.756 76.096)
(width 0.25)
(layer "F.Cu")
(net 4)
(uuid "55001221-5b96-4dcd-951e-549dbc7b2eb6")
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 151.2 91.4)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(end 197.136 82.556)
(width 0.25)
(layer "F.Cu")
(net 4)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "d55dc473-f535-451a-b953-359cfe4991f1")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 143.7 91.4)
(end 151.2 91.4)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 4)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "ed14d8b1-d58f-4c7d-8b11-c69b459c76e3")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(via
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(at 143.7 91.4)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(size 0.9)
(drill 0.5)
(layers "F.Cu" "B.Cu")
(net 4)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "9eaf2256-1b3f-42b7-998d-76e3f3f0ee50")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 143.7 95.52)
(end 143.72 95.54)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 4)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "c79fc09a-5e59-4a97-be14-7d74cda81cf9")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 143.7 91.4)
(end 143.7 95.52)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "B.Cu")
(net 4)
(uuid "fe4ec230-7a16-48d2-aa57-b8a4e0a5c6cc")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 146.25 90)
(end 151.15 90)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 5)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "0977bdf4-4be7-4e81-9b89-f7d94ce37326")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 195.436 81.756)
(end 203.216 76.096)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 5)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "4e69342a-c699-418b-b06a-fa287d10a1a2")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 151.15 90)
(end 195.436 81.756)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 5)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "864ccca1-5280-4c75-82d7-e94e0cbe16f8")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(via
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(at 146.3 90)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(size 0.9)
(drill 0.5)
(layers "F.Cu" "B.Cu")
(net 5)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "39f873ae-e84e-4f6e-b1f1-03c475bcc41a")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 146.3 95.5)
(end 146.26 95.54)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 5)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "5726c7ee-4e48-4120-acc0-8935231a6b3f")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 146.3 90.1)
(end 146.3 95.5)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "B.Cu")
(net 5)
(uuid "aafb9f13-a149-44fb-9586-7e29b7ac3611")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 193.936 80.956)
(end 200.676 76.096)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 6)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "d8c353b5-a3d7-484e-8216-6044488beff3")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 151.2 88.6)
(end 193.936 80.956)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 6)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "e291ff78-c7e8-420c-a24b-b32ba9b2b869")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 151.2 88.6)
(end 148.8 88.6)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 6)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "e9206293-1518-4074-8715-7d0698eca963")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(via
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(at 148.8 88.6)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(size 0.9)
(drill 0.5)
(layers "F.Cu" "B.Cu")
(net 6)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "ec7e1c9b-9247-4cd2-a3db-37dcb7ae5e25")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 148.8 88.6)
(end 148.8 80.3)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 6)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "8d13453b-c68b-48f9-ae87-21f389d7bb47")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
(start 198.136 76.096)
(end 192.536 80.156)
(width 0.25)
(layer "F.Cu")
(net 7)
(uuid "0f5c8c98-2fef-47ac-bd3a-14557d5e78c0")
)
(segment
(start 192.536 80.156)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(end 151.2 87)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 7)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "766c6ed1-2c61-440b-b7bb-358c6a7e0045")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 151.2 87)
(end 146.3 87)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 7)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "f288cbec-b4d1-43a8-a814-b07c19173544")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(via
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(at 146.3 87)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(size 0.9)
(drill 0.5)
(layers "F.Cu" "B.Cu")
(net 7)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "eddc62ec-a789-47df-8019-7d2eb7ffef55")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 146.3 87)
(end 146.3 80.34)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 7)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "5603e0ca-6dba-4816-823f-5828e2b1b299")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 146.3 80.34)
(end 146.26 80.3)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "B.Cu")
(net 7)
(uuid "c602900a-08ac-429e-97bf-c687197fb4d7")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 151.2 85.6)
(end 143.8 85.6)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 8)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "09b17a13-9fba-4b0f-9dc5-6dafa2305039")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
(start 191.336 79.256)
(end 195.596 76.096)
(width 0.25)
(layer "F.Cu")
(net 8)
(uuid "91ea0062-e015-48c9-850f-282d10a79093")
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 151.2 85.6)
(end 191.336 79.256)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 8)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "f97c73e1-4782-453b-83bd-bfc8cd00dc69")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(via
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(at 143.8 85.6)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(size 0.9)
(drill 0.5)
(layers "F.Cu" "B.Cu")
(net 8)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "895f7e9b-adb3-4c5d-8533-fafd39efc054")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 143.8 85.6)
(end 143.8 80.38)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 8)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "09b0b4f9-9495-43f6-a341-e6ca0f3c2e9e")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 143.8 80.38)
(end 143.72 80.3)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "B.Cu")
(net 8)
(uuid "a1357399-9681-47e1-85f5-0114eb2add10")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 193.056 76.096)
(end 189.936 78.456)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 9)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "654e96e7-0eb6-4fd5-83ef-abd6eac38709")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 189.936 78.456)
(end 151.2 84.2)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 9)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "903f61b6-8c32-4aff-8c04-e35672535ebe")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 151.2 84.2)
(end 141.2 84.2)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 9)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "b93b38e5-d752-48eb-af16-81e15a0ecf50")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(via
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(at 141.2 84.2)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(size 0.9)
(drill 0.5)
(layers "F.Cu" "B.Cu")
(net 9)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "36555901-e116-43a6-bf1d-257a6fe99b56")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(segment
(start 141.2 80.32)
(end 141.18 80.3)
(width 0.25)
(layer "B.Cu")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(net 9)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "18f5cf23-25cb-4253-b15d-ddd9354e6980")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 141.2 84.1)
(end 141.2 80.32)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 9)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "280f8df1-225c-4ae5-b0e2-f0e344558492")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 151.2 82.8)
(end 140.3 82.8)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 10)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "54c136e2-f325-4a6f-8b6a-36c46d914dd7")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 190.516 76.096)
(end 188.836 77.556)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 10)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "b0e1848c-ae16-4ce3-9ac1-b0a9a5a31d91")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 140.3 82.8)
(end 138.64 81.14)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 10)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "b282f59f-4172-4054-9293-c567e344dae5")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 188.836 77.556)
(end 151.2 82.8)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 10)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "cbda3b08-5d73-4b9d-8fd1-7afde2319e99")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 138.64 81.14)
(end 138.64 80.3)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 10)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "e4b3b747-1bcd-4ab2-9754-d7df727907cb")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
(start 157.46 76.132)
(end 157.46 79.2)
(width 0.25)
(layer "F.Cu")
(net 21)
(uuid "1c58a734-9233-4765-bf81-0cce6e05021e")
)
(segment
(start 154.75 78.75)
(end 153.3125 80.1875)
(width 0.25)
(layer "F.Cu")
(net 21)
(uuid "2314484d-83af-4de8-99af-5dbf64b0f33e")
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 155.15 78.9)
(end 157.16 78.9)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 21)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "3deb744d-c0a1-451b-ab64-f5ebe579a5a7")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 153.3125 80.1875)
(end 153.3125 80.5)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 21)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "4cf663d1-14a0-49a5-a48a-5e9dbe418a22")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 154.75 78.5)
(end 155.15 78.9)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 21)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "66703641-1a43-4340-aba1-3764705c9b50")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 154.75 78.5)
(end 154.75 78.75)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 21)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "68a30df9-a8f4-4cac-abab-6d9f5f5f4622")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 157.16 78.9)
(end 157.46 79.2)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 21)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "d2bfd976-5802-48ca-bf7c-d779cc17138c")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
(start 157.496 76.096)
(end 157.46 76.132)
(width 0.25)
(layer "F.Cu")
(net 21)
(uuid "f34e2ea7-c6f2-44b5-9267-d6e5baf0f496")
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 139.9 92.8)
(end 139.9 78.452)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 24)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "6db03186-a261-4c8a-882c-2d733e6af498")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 138.64 94.06)
(end 139.9 92.8)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 24)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "7534e674-0e3b-48cc-8e21-db5d91e91fde")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 139.9 78.452)
(end 142.256 76.096)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 24)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "900f4a94-f2f6-4ff8-962f-2a3dce9f0c03")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 138.64 95.54)
(end 138.64 94.06)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 24)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "f8363d26-c672-4fc2-ab0d-3563098f01cf")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 136.1 95.54)
(end 136.1 94.1)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "ac060fb3-4fca-4aeb-a010-8a5696407753")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 136.1 94.1)
(end 137.4 92.8)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "ca1cf276-f982-4e61-ac5c-752385a2ac60")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 137.4 78.412)
(end 139.716 76.096)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "dfa3ffe7-adb8-4e71-8bb0-385122c3f229")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 137.4 92.8)
(end 137.4 78.412)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "e59c9a5f-0574-4f8d-94b2-fca3bb282e72")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 134.8 92.8)
(end 134.8 78.472)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 26)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "391684f2-32b1-4527-aa24-4e7a2659bb8b")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 133.56 94.04)
(end 134.8 92.8)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 26)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "7b5bc7c8-b14b-420c-b2ce-fd6ee68a5018")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 133.56 95.54)
(end 133.56 94.04)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 26)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "82ab3a76-5fb8-4871-ae2a-b19c43035c8b")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 134.8 78.472)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(end 137.176 76.096)
(width 0.25)
(layer "B.Cu")
(net 26)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "edcc1219-4bee-4e8e-a004-94b336fcddfd")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 131.02 95.54)
(end 131.02 94.096)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 27)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "60b12101-a8e6-43e4-a2cf-69758d10bfbe")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 132.316 92.8)
(end 132.316 78.416)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 27)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "66ebc666-0155-4b42-82e8-78537dc8115f")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 131.02 94.096)
(end 132.316 92.8)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 27)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "ab9e5783-079a-4780-8150-cbe3543a6839")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 132.316 78.416)
(end 134.636 76.096)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 27)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "fed0a188-ab03-4e27-8bce-ff3583977948")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 129.8 78.392)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(end 132.096 76.096)
(width 0.25)
(layer "B.Cu")
(net 28)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "0fbe543b-fc5e-4e02-8191-78da3cb1c3b5")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 129.8 92.8)
(end 129.8 78.392)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 28)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "96af9faa-b353-4076-aebf-b49eebbbdab6")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 128.48 95.54)
(end 128.48 94.12)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 28)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "dff74ef4-c48d-4213-bea2-823bf54c7c83")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 128.48 94.12)
(end 129.8 92.8)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 28)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "e35a24bd-cb9f-44b6-9816-3e2a17741872")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 125.94 95.54)
(end 125.94 94.06)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 29)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "2baebb57-fac4-4e3b-8505-330ffbf5a4de")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 127.2 92.8)
(end 127.2 78.452)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 29)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "4242e894-961f-436e-aaba-65f02ca5730f")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 125.94 94.06)
(end 127.2 92.8)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 29)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "6575b085-59ec-40c1-bb6e-b5ba9bf05855")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 127.2 78.452)
(end 129.556 76.096)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 29)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "6a6837d5-1b43-4dfd-82d4-dac1a24f8026")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 124.7 78.412)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(end 127.016 76.096)
(width 0.25)
(layer "B.Cu")
(net 30)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "3889fee5-0b04-4d9f-b48f-a3f0601fb1ca")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 124.7 92.8)
(end 124.7 78.412)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 30)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "54a61146-9f23-40e9-b844-9dc5b081056c")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 123.4 95.54)
(end 123.4 94.1)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 30)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "6c33fcee-3814-4076-9714-866f4afef8e7")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 123.4 94.1)
(end 124.7 92.8)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "B.Cu")
(net 30)
(uuid "c9a34eee-cf49-4bb7-9b4d-075eafc754e6")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 122.1 78.472)
(end 124.476 76.096)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "B.Cu")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(net 31)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "1f987f5a-7ce0-4a39-a1b9-e4a5c8fe864b")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 122.1 92.8)
(end 122.1 78.472)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 31)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "72cfafaf-d29f-4fd5-8a42-4de13b179abe")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 120.86 95.54)
(end 120.86 94.04)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 31)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "91d0d1b4-9fb5-4ac8-a467-6c590ad021d4")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 120.86 94.04)
(end 122.1 92.8)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 31)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "fe8008d6-0e1a-4a4c-816f-b8b5e2072f36")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 121.936 77.136)
(end 123.4 78.6)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 32)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "d22091d6-b932-4c05-8331-8b91f6cdfe70")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 121.936 76.096)
(end 121.936 77.136)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 32)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "e4b8f691-5a71-4251-b88e-f0dcde463070")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 123.4 78.6)
(end 123.4 80.3)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "F.Cu")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(net 32)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "fd20afc4-2434-4449-a8ca-3692e5613965")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 124.24 82)
(end 122.9 82)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 33)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "1ca108dd-208c-4fa3-b845-77aedbd2170d")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 125.94 80.3)
(end 124.24 82)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 33)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "279d6eee-ea12-4310-a062-6fa8a77c968f")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 122.1 78.8)
(end 119.396 76.096)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(net 33)
(uuid "531a46ac-90e7-49e8-92c0-e683e34c6dfa")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 122.9 82)
(end 122.1 81.2)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(net 33)
(uuid "83057144-3fdf-4995-b36c-0456c2ae5383")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 122.1 81.2)
(end 122.1 78.8)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(net 33)
(uuid "b6cb83b6-0d03-4302-9df7-94f6d243cb27")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 118.152 74.8)
(end 116.856 76.096)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 34)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "08f23b9e-6bc7-4479-8e87-1acc2ff349da")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 131.86 78.6)
(end 125.1 78.6)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 34)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "15b98266-b695-48c7-b0e2-90c9d422308b")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 125.1 78.6)
(end 123.2 76.7)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "F.Cu")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(net 34)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "18c490d5-53c1-4258-b366-b18a85cc399c")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 133.56 80.3)
(end 131.86 78.6)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "F.Cu")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(net 34)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "59eec7ef-ffa3-4985-bb99-b4e31b3ed0cd")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 123.2 75.5)
(end 122.5 74.8)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "F.Cu")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(net 34)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "7f2d6032-1395-46b3-8791-284c6e8f43a3")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 122.5 74.8)
(end 118.152 74.8)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "F.Cu")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(net 34)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "c3f9b0fb-dffe-4409-bc44-25a833798a3a")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 123.2 76.7)
(end 123.2 75.5)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "F.Cu")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(net 34)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "ee21fc1a-e460-4a9c-89aa-e66932d2a50f")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 128.48 80.3)
(end 126.28 82.5)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 35)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "4813722d-072c-43c2-97f9-a9775eaf4d45")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 126.28 82.5)
(end 120.7 82.5)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 35)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "7fa837f8-a953-49ff-a1f5-88fb965c917f")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 119.6 82.5)
(end 120.7 82.5)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 35)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "d1a9a8a1-9d58-4032-b754-7bf63d432794")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(via
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(at 119.6 82.5)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(size 0.9)
(drill 0.5)
(layers "F.Cu" "B.Cu")
(net 35)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "daeaf07e-28d3-42bf-8b70-74c3bf421589")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 116.32 78.1)
(end 118.4 78.1)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 35)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "383588e1-29f7-4674-88ab-8c30cafb839e")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 118.4 78.1)
(end 119.6 79.3)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 35)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "60ffa7ca-4772-4d64-b3c3-5400bddff698")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 114.316 76.096)
(end 116.32 78.1)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 35)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "95e882f3-2a68-4894-9b87-4d662fcc5ff0")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 119.6 79.3)
(end 119.6 82.5)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "B.Cu")
(net 35)
(uuid "e84543f3-56a7-42e9-a888-3101ec34a740")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 116.3 78.6)
(end 117 79.3)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "B.Cu")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(net 36)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "68948320-0738-407b-96c9-69a1f5f560bd")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 118.32 82.62)
(end 118.32 95.54)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 36)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "89ee86e8-6b0e-491b-b675-a1b3cc3a6bc2")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 114.28 78.6)
(end 116.3 78.6)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 36)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "ab8bf35c-8bf5-417d-bb63-06771cbe8453")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 117 79.3)
(end 117 81.3)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 36)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "d16a38a1-8499-4496-9a82-c2a1dc37d266")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 117 81.3)
(end 118.32 82.62)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "B.Cu")
(net 36)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "d40827b5-df28-4f42-a928-5d29082c7da3")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 111.776 76.096)
(end 114.28 78.6)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(layer "B.Cu")
(net 36)
(uuid "e0684d71-1743-4f7b-bd19-1305ea77f151")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 120.86 80.3)
(end 118.66 78.1)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 37)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "35791ea2-cc97-41bd-bfa1-914089a54bd5")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 111.24 78.1)
(end 109.236 76.096)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 37)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "aa567e73-a31e-4678-920a-584156077c76")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 118.66 78.1)
(end 111.24 78.1)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 37)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "cfe83df0-9fe6-406e-b42f-f7a5048ded13")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
(start 104.5 81.6)
(end 106.2 81.6)
(width 0.25)
(layer "F.Cu")
(net 38)
(uuid "08b11300-dee7-47b1-b891-5627f72d95c1")
)
(segment
(start 107.5 76.9)
(end 106.696 76.096)
(width 0.25)
(layer "F.Cu")
(net 38)
(uuid "1e3c5a9a-9f2b-435c-a06a-bf713fa1f445")
)
(segment
(start 102.7 83.4)
(end 104.5 81.6)
(width 0.25)
(layer "F.Cu")
(net 38)
(uuid "2a4bdd2f-066d-46d8-904a-cdb594a9e06e")
)
(segment
(start 102.7 84.075)
(end 102.7 83.4)
(width 0.25)
(layer "F.Cu")
(net 38)
(uuid "319fb3d9-a79f-463a-be65-b582266ec84e")
)
(segment
(start 107.5 80.3)
(end 107.5 76.9)
(width 0.25)
(layer "F.Cu")
(net 38)
(uuid "9902aad7-94f7-45e9-91a9-f8a71f62a90f")
)
(segment
(start 106.2 81.6)
(end 107.5 80.3)
(width 0.25)
(layer "F.Cu")
(net 38)
(uuid "a7b1bb26-c106-41e1-bdc1-beb60c69655c")
)
(segment
(start 103.97 79.125)
(end 105.24 79.125)
(width 0.25)
(layer "F.Cu")
(net 39)
(uuid "0cca3213-6116-48fa-bba8-d27027c330d0")
)
(segment
(start 103.97 76.282)
(end 104.156 76.096)
(width 0.25)
(layer "F.Cu")
(net 39)
(uuid "26b55789-3e48-48f5-a9ab-2bf926370073")
)
(segment
(start 102.7 79.125)
(end 103.97 79.125)
(width 0.25)
(layer "F.Cu")
(net 39)
(uuid "7b8243cb-5ef6-4982-ba0b-04bee56dd766")
)
(segment
(start 103.97 79.125)
(end 103.97 76.282)
(width 0.25)
(layer "F.Cu")
(net 39)
(uuid "84bc0388-10dc-44dd-9ab2-6a9e50b612ca")
)
(segment
(start 98.1 85.7)
(end 96.581 84.181)
(width 0.25)
(layer "F.Cu")
(net 42)
(uuid "5511dabb-f422-4236-99bd-88304e02d1ac")
)
(segment
(start 103.2 85.7)
(end 98.1 85.7)
(width 0.25)
(layer "F.Cu")
(net 42)
(uuid "7c6a7598-c628-4df0-8885-4f2b0eb183a2")
)
(segment
(start 104.006 84.894)
(end 103.2 85.7)
(width 0.25)
(layer "F.Cu")
(net 42)
(uuid "a29e8e6c-d9e5-462e-aef3-5dc09603483a")
)
(segment
(start 104.006 84.181)
(end 104.006 84.894)
(width 0.25)
(layer "F.Cu")
(net 42)
(uuid "fb1c2f0b-27ce-40dd-9fb7-91bd4b57a686")
)
(via
(at 96.581 84.181)
(size 0.9)
(drill 0.5)
(layers "F.Cu" "B.Cu")
(net 42)
(uuid "a74c2284-d92f-4cd9-9251-ae43359d094f")
)
(segment
(start 96.581 84.181)
(end 94 81.6)
(width 0.25)
(layer "B.Cu")
(net 42)
(uuid "457d307e-7a35-4104-96bb-bd1525611b6a")
)
(segment
(start 94 81.6)
(end 94 76.1)
(width 0.25)
(layer "B.Cu")
(net 42)
(uuid "7d4db51c-69f5-41ff-bd93-1b03d2b3d40d")
)
(segment
(start 94 76.1)
(end 93.996 76.096)
(width 0.25)
(layer "B.Cu")
(net 42)
(uuid "ab6879a5-914e-492e-ab46-6fbf3305cec5")
)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(segment
(start 118.32 80.88)
(end 112.7 86.5)
(width 0.25)
(layer "F.Cu")
(net 43)
(uuid "2a993134-b6d9-4fa3-b2c0-9cf28ee2a6fd")
)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(segment
(start 97.6 86.5)
(end 95.1 84)
(width 0.25)
(layer "F.Cu")
(net 43)
(uuid "3c67bb1f-3b6a-4149-8f96-97d0aa3ebdd4")
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 118.32 80.3)
(end 118.32 80.88)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(width 0.25)
(layer "F.Cu")
(net 43)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "4f921d12-0d46-4b46-9f33-3c0676bb715b")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
(start 102.5 86.5)
(end 104 86.5)
(width 0.25)
(layer "F.Cu")
(net 43)
(uuid "603fcff7-1c30-49d2-b499-fd42587d6cd1")
)
(segment
(start 102.5 86.5)
(end 97.6 86.5)
(width 0.25)
(layer "F.Cu")
(net 43)
(uuid "a118375b-2be7-4dce-b9aa-b3ad11a14bf2")
)
(via
(at 95.1 84)
(size 0.9)
(drill 0.5)
(layers "F.Cu" "B.Cu")
(net 43)
(uuid "4687cea2-3ac2-4b94-8ebf-b4211242dff8")
)
(via
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(at 112.7 86.5)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(size 0.9)
(drill 0.5)
(layers "F.Cu" "B.Cu")
(net 43)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "93655cc6-d048-4271-8a56-ec713d10526a")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(via
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(at 104 86.5)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(size 0.9)
(drill 0.5)
(layers "F.Cu" "B.Cu")
(net 43)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "d8eacfae-0cda-44e0-bf11-c6d6dee46ee6")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
(start 91.45 76.102)
(end 91.456 76.096)
(width 0.25)
(layer "B.Cu")
(net 43)
(uuid "034a850e-8efd-441b-b002-7177c771cdd2")
)
(segment
(start 91.45 80.35)
(end 91.45 76.102)
(width 0.25)
(layer "B.Cu")
(net 43)
(uuid "07443818-8c74-4f09-b80c-2dff1ffafbc8")
)
(segment
(start 111.5 86.5)
(end 104 86.5)
(width 0.25)
(layer "B.Cu")
(net 43)
(uuid "4cb0c6a4-d575-4554-895a-3115b710c1b4")
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 112.7 86.5)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(end 111.5 86.5)
(width 0.25)
(layer "B.Cu")
(net 43)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "b0de9a16-2a5a-4920-9801-c38d32be74f9")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
)
(segment
(start 95.1 84)
(end 91.45 80.35)
(width 0.25)
(layer "B.Cu")
(net 43)
(uuid "f36d7b33-1f9b-4bc2-8a85-7cf6017fd168")
)
(segment
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 136.1 80.3)
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "13a1c95c-d74d-40ea-9185-287db1bda84a")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(start 129.7 87.4)
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(uuid "d3f43005-9909-4f6e-bd70-8a64518e7d5f")
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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(xy 83.251019 94.161702) (xy 83.153022 94.123738) (xy 83.052198 94.084679) (xy 83.052197 94.084678)
(xy 83.052195 94.084678) (xy 82.84261 94.0455) (xy 82.62939 94.0455) (xy 82.419804 94.084678) (xy 82.22098 94.161702)
(xy 82.220975 94.161705) (xy 82.039699 94.273946) (xy 82.039692 94.273952) (xy 81.882135 94.417586)
(xy 81.882131 94.417589) (xy 81.882128 94.417593) (xy 81.882125 94.417597) (xy 81.753635 94.587743)
(xy 81.75363 94.587752) (xy 81.658596 94.778608) (xy 81.600244 94.983688) (xy 81.580571 95.196)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 80 95.196) (xy 80 87.112893) (xy 80.7105 87.112893) (xy 80.7105 87.699106) (xy 80.721123 87.787565)
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(xy 80.7305 93.357) (xy 80.734261 93.404786) (xy 80.737983 93.428289) (xy 80.739106 93.43538) (xy 80.739106 93.435385)
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(xy 80.982401 93.727639) (xy 80.982403 93.72764) (xy 81.040596 93.746548) (xy 81.040593 93.746548)
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(xy 85.045754 93.746487) (xy 85.147162 93.698309) (xy 85.196662 93.662345) (xy 85.253919 93.608177)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 85.307641 93.509594) (xy 85.326548 93.451403) (xy 85.333931 93.404789) (xy 85.3415 93.357003)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 85.3415 90.4605) (xy 85.360407 90.402309) (xy 85.409907 90.366345) (xy 85.4405 90.3615) (xy 87.89169 90.3615)
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(xy 90.476637 87.428339) (xy 90.476638 87.428341) (xy 90.476639 87.428342) (xy 90.568078 87.548922)
(xy 90.688658 87.640361) (xy 90.688659 87.640361) (xy 90.68866 87.640362) (xy 90.732568 87.657677)
(xy 90.829436 87.695877) (xy 90.917898 87.7065) (xy 90.9179 87.7065) (xy 91.9541 87.7065) (xy 91.954102 87.7065)
(xy 92.042564 87.695877) (xy 92.183342 87.640361) (xy 92.303922 87.548922) (xy 92.395361 87.428342)
(xy 92.450877 87.287564) (xy 92.4615 87.199102) (xy 92.4615 86.612898) (xy 92.450877 86.524436)
(xy 92.395361 86.383658) (xy 92.303922 86.263078) (xy 92.303917 86.263074) (xy 92.213103 86.194207)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 92.178161 86.143981) (xy 92.174546 86.104239) (xy 92.179588 86.059497) (xy 92.183021 86.029027)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 92.191249 85.956003) (xy 92.191249 85.955995) (xy 92.172314 85.787946) (xy 92.172311 85.787934)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 92.141804 85.700751) (xy 92.116456 85.62831) (xy 92.098664 85.599995) (xy 92.026479 85.485113)
(xy 92.026478 85.485112) (xy 92.026477 85.48511) (xy 91.90689 85.365523) (xy 91.906887 85.365521)
(xy 91.906886 85.36552) (xy 91.763691 85.275544) (xy 91.604065 85.219688) (xy 91.604053 85.219685)
(xy 91.436004 85.200751) (xy 91.435996 85.200751) (xy 91.267946 85.219685) (xy 91.267934 85.219688)
(xy 91.108309 85.275544) (xy 91.108308 85.275544) (xy 90.965113 85.36552) (xy 90.84552 85.485113)
(xy 90.755544 85.628308) (xy 90.755544 85.628309) (xy 90.699688 85.787934) (xy 90.699685 85.787946)
(xy 90.680751 85.955995) (xy 90.680751 85.955996) (xy 90.680751 85.956) (xy 90.693207 86.066546)
(xy 90.697454 86.10424) (xy 90.68518 86.164181) (xy 90.658896 86.194207) (xy 90.568083 86.263073)
(xy 90.568075 86.263081) (xy 90.47664 86.383656) (xy 90.476637 86.38366) (xy 90.421123 86.524434)
(xy 90.4105 86.612893) (xy 89.0415 86.612893) (xy 89.0415 83.999995) (xy 94.344751 83.999995) (xy 94.344751 84.000004)
(xy 94.363685 84.168053) (xy 94.363688 84.168065) (xy 94.419544 84.32769) (xy 94.419544 84.327691)
(xy 94.444913 84.368065) (xy 94.509523 84.47089) (xy 94.62911 84.590477) (xy 94.629112 84.590478)
(xy 94.629113 84.590479) (xy 94.757085 84.67089) (xy 94.77231 84.680456) (xy 94.836232 84.702823)
(xy 94.931934 84.736311) (xy 94.931938 84.736312) (xy 94.931941 84.736313) (xy 94.931942 84.736313)
(xy 94.931946 84.736314) (xy 95.099996 84.755249) (xy 95.1 84.755249) (xy 95.100002 84.755249) (xy 95.121913 84.752779)
(xy 95.190579 84.745042) (xy 95.250519 84.757314) (xy 95.271667 84.773415) (xy 97.259515 86.761263)
(xy 97.259514 86.761263) (xy 97.338737 86.840485) (xy 97.435759 86.896501) (xy 97.435757 86.896501)
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(xy 103.725609 87.199106) (xy 103.831934 87.236311) (xy 103.831938 87.236312) (xy 103.831941 87.236313)
(xy 103.831942 87.236313) (xy 103.831946 87.236314) (xy 103.999996 87.255249) (xy 104 87.255249)
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(xy 104.32769 87.180456) (xy 104.327692 87.180454) (xy 104.327694 87.180454) (xy 104.359694 87.160347)
(xy 104.419025 87.145396) (xy 104.475812 87.168175) (xy 104.508365 87.219982) (xy 104.510744 87.255249)
(xy 104.494435 87.4) (xy 104.497695 87.428935) (xy 104.514632 87.579257) (xy 104.514633 87.579261)
(xy 104.574211 87.749522) (xy 104.574211 87.749523) (xy 104.645946 87.863688) (xy 104.670184 87.902262)
(xy 104.797738 88.029816) (xy 104.950478 88.125789) (xy 105.001542 88.143657) (xy 105.120738 88.185366)
(xy 105.120742 88.185367) (xy 105.120745 88.185368) (xy 105.3 88.205565) (xy 105.479255 88.185368)
(xy 105.649522 88.125789) (xy 105.802262 88.029816) (xy 105.929816 87.902262) (xy 105.939029 87.8876)
(xy 105.94894 87.871828) (xy 105.995909 87.832616) (xy 106.032765 87.8255) (xy 129.756016 87.8255)
(xy 129.756018 87.8255) (xy 129.864237 87.796503) (xy 129.864239 87.796501) (xy 129.864241 87.796501)
(xy 129.893064 87.779859) (xy 129.961263 87.740485) (xy 135.880913 81.820833) (xy 135.935428 81.793058)
(xy 135.966402 81.793058) (xy 135.98267 81.795634) (xy 136.013387 81.8005) (xy 136.013389 81.8005)
(xy 136.186614 81.8005) (xy 136.357702 81.773402) (xy 136.357706 81.773401) (xy 136.522438 81.719876)
(xy 136.52244 81.719874) (xy 136.522445 81.719873) (xy 136.676788 81.641232) (xy 136.816928 81.539414)
(xy 136.939414 81.416928) (xy 137.041232 81.276788) (xy 137.119873 81.122445) (xy 137.119874 81.12244)
(xy 137.119876 81.122438) (xy 137.173401 80.957706) (xy 137.173402 80.957702) (xy 137.2005 80.786614)
(xy 137.2005 79.813385) (xy 137.5395 79.813385) (xy 137.5395 80.786614) (xy 137.566597 80.957702)
(xy 137.566598 80.957706) (xy 137.620123 81.122438) (xy 137.620125 81.122441) (xy 137.698682 81.276621)
(xy 137.698768 81.276788) (xy 137.800586 81.416928) (xy 137.923072 81.539414) (xy 138.063212 81.641232)
(xy 138.217555 81.719873) (xy 138.217557 81.719873) (xy 138.217558 81.719874) (xy 138.217561 81.719876)
(xy 138.382293 81.773401) (xy 138.382297 81.773402) (xy 138.553386 81.8005) (xy 138.553389 81.8005)
(xy 138.657744 81.8005) (xy 138.715935 81.819407) (xy 138.727748 81.829496) (xy 140.038737 83.140485)
(xy 140.038739 83.140486) (xy 140.135759 83.196501) (xy 140.135757 83.196501) (xy 140.135761 83.196502)
(xy 140.135763 83.196503) (xy 140.243982 83.2255) (xy 140.356019 83.2255) (xy 151.167611 83.2255)
(xy 151.179791 83.226252) (xy 151.203238 83.229159) (xy 151.218956 83.226968) (xy 151.222704 83.226447)
(xy 151.236364 83.2255) (xy 151.256018 83.2255) (xy 151.278843 83.219383) (xy 151.290801 83.216957)
(xy 188.840389 77.984997) (xy 188.860976 77.984294) (xy 188.862138 77.984375) (xy 188.862139 77.984374)
(xy 188.862142 77.984375) (xy 188.903411 77.976357) (xy 188.908597 77.975493) (xy 188.916641 77.974373)
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(xy 143.297558 96.959874) (xy 143.297561 96.959876) (xy 143.462293 97.013401) (xy 143.462297 97.013402)
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(xy 145.837557 96.959873) (xy 145.837558 96.959874) (xy 145.837561 96.959876) (xy 146.002293 97.013401)
(xy 146.002297 97.013402) (xy 146.173386 97.0405) (xy 146.173389 97.0405) (xy 146.346614 97.0405)
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(xy 149.819874 94.717558) (xy 149.819873 94.717557) (xy 149.819873 94.717555) (xy 149.741232 94.563212)
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(xy 148.377558 94.120125) (xy 148.223214 94.198766) (xy 148.083073 94.300585) (xy 147.960585 94.423073)
(xy 147.858766 94.563214) (xy 147.780125 94.717558) (xy 147.780123 94.717561) (xy 147.726598 94.882293)
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(xy 147.279873 94.717555) (xy 147.201232 94.563212) (xy 147.099414 94.423072) (xy 146.976928 94.300586)
(xy 146.836788 94.198768) (xy 146.836787 94.198767) (xy 146.836785 94.198766) (xy 146.682441 94.120125)
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(xy 146.002293 94.066598) (xy 145.837561 94.120123) (xy 145.837558 94.120125) (xy 145.683214 94.198766)
(xy 145.543073 94.300585) (xy 145.420585 94.423073) (xy 145.318766 94.563214) (xy 145.240125 94.717558)
(xy 145.240123 94.717561) (xy 145.186598 94.882293) (xy 145.186597 94.882297) (xy 145.1595 95.053385)
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(xy 144.739874 94.717558) (xy 144.739873 94.717557) (xy 144.739873 94.717555) (xy 144.661232 94.563212)
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(xy 143.297558 94.120125) (xy 143.143214 94.198766) (xy 143.003073 94.300585) (xy 142.880585 94.423073)
(xy 142.778766 94.563214) (xy 142.700125 94.717558) (xy 142.700123 94.717561) (xy 142.646598 94.882293)
(xy 142.646597 94.882297) (xy 142.6195 95.053385) (xy 142.2805 95.053385) (xy 142.253402 94.882297)
(xy 142.253401 94.882293) (xy 142.199876 94.717561) (xy 142.199874 94.717558) (xy 142.199873 94.717557)
(xy 142.199873 94.717555) (xy 142.121232 94.563212) (xy 142.019414 94.423072) (xy 141.896928 94.300586)
(xy 141.896924 94.300583) (xy 141.896923 94.300582) (xy 141.877316 94.286336) (xy 141.841353 94.236835)
(xy 141.841355 94.175649) (xy 141.865506 94.136241) (xy 142.647253 93.354496) (xy 142.701769 93.326719)
(xy 142.717256 93.3255) (xy 151.183337 93.3255) (xy 151.18962 93.325699) (xy 151.228893 93.328198)
(xy 151.230655 93.327843) (xy 151.232662 93.327441) (xy 151.252168 93.3255) (xy 151.256017 93.3255)
(xy 151.256018 93.3255) (xy 151.294061 93.315305) (xy 151.300137 93.313883) (xy 198.230298 83.885017)
(xy 198.239099 83.883658) (xy 198.337568 83.87298) (xy 198.44203 83.832484) (xy 198.46239 83.817588)
(xy 198.47689 83.80878) (xy 198.486671 83.803934) (xy 198.51095 83.782558) (xy 198.517896 83.776978)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 207.630683 77.109969) (xy 207.688808 77.090871) (xy 207.741253 77.105699) (xy 207.780981 77.130298)
(xy 207.979802 77.207321) (xy 208.18939 77.2465) (xy 208.40261 77.2465) (xy 208.612198 77.207321)
(xy 208.811019 77.130298) (xy 208.992302 77.018052) (xy 209.149872 76.874407) (xy 209.278366 76.704255)
(xy 209.373405 76.513389) (xy 209.431756 76.30831) (xy 209.451429 76.096) (xy 209.680571 76.096)
(xy 209.700244 76.308311) (xy 209.718016 76.370772) (xy 209.758595 76.513389) (xy 209.853634 76.704255)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 209.982128 76.874407) (xy 210.052734 76.938773) (xy 210.139692 77.018047) (xy 210.139699 77.018053)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 210.21775 77.06638) (xy 210.320981 77.130298) (xy 210.519802 77.207321) (xy 210.72939 77.2465)
(xy 210.94261 77.2465) (xy 211.152198 77.207321) (xy 211.351019 77.130298) (xy 211.532302 77.018052)
(xy 211.689872 76.874407) (xy 211.818366 76.704255) (xy 211.913405 76.513389) (xy 211.971756 76.30831)
(xy 211.991429 76.096) (xy 211.971756 75.88369) (xy 211.913405 75.678611) (xy 211.818366 75.487745)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 211.689872 75.317593) (xy 211.603372 75.238737) (xy 211.532307 75.173952) (xy 211.5323 75.173946)
(xy 211.351024 75.061705) (xy 211.351019 75.061702) (xy 211.231424 75.015371) (xy 211.152198 74.984679)
(xy 211.152197 74.984678) (xy 211.152195 74.984678) (xy 210.94261 74.9455) (xy 210.72939 74.9455)
(xy 210.519804 74.984678) (xy 210.32098 75.061702) (xy 210.320975 75.061705) (xy 210.139699 75.173946)
(xy 210.139692 75.173952) (xy 209.982135 75.317586) (xy 209.982131 75.317589) (xy 209.982128 75.317593)
(xy 209.982125 75.317597) (xy 209.853635 75.487743) (xy 209.85363 75.487752) (xy 209.777964 75.639712)
(xy 209.758595 75.678611) (xy 209.746655 75.720574) (xy 209.700244 75.883688) (xy 209.680571 76.096)
(xy 209.451429 76.096) (xy 209.431756 75.88369) (xy 209.373405 75.678611) (xy 209.278366 75.487745)
(xy 209.149872 75.317593) (xy 209.063372 75.238737) (xy 208.992307 75.173952) (xy 208.9923 75.173946)
(xy 208.811024 75.061705) (xy 208.811019 75.061702) (xy 208.691424 75.015371) (xy 208.612198 74.984679)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 208.612197 74.984678) (xy 208.612195 74.984678) (xy 208.40261 74.9455) (xy 208.18939 74.9455)
(xy 207.979804 74.984678) (xy 207.78098 75.061702) (xy 207.780975 75.061705) (xy 207.599699 75.173946)
(xy 207.599692 75.173952) (xy 207.442135 75.317586) (xy 207.442131 75.317589) (xy 207.442128 75.317593)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 207.442125 75.317597) (xy 207.313635 75.487743) (xy 207.31363 75.487752) (xy 207.237964 75.639712)
(xy 207.218595 75.678611) (xy 207.206655 75.720574) (xy 207.160244 75.883688) (xy 207.160244 75.88369)
(xy 207.140571 76.096) (xy 207.160244 76.30831) (xy 207.160245 76.308312) (xy 207.160245 76.308314)
(xy 207.162907 76.317671) (xy 207.160645 76.378814) (xy 207.126141 76.424661) (xy 207.02085 76.501693)
(xy 206.962723 76.520792) (xy 206.90447 76.502078) (xy 206.868342 76.452697) (xy 206.867175 76.394701)
(xy 206.891756 76.30831) (xy 206.911429 76.096) (xy 206.891756 75.88369) (xy 206.833405 75.678611)
(xy 206.738366 75.487745) (xy 206.609872 75.317593) (xy 206.523372 75.238737) (xy 206.452307 75.173952)
(xy 206.4523 75.173946) (xy 206.271024 75.061705) (xy 206.271019 75.061702) (xy 206.151424 75.015371)
(xy 206.072198 74.984679) (xy 206.072197 74.984678) (xy 206.072195 74.984678) (xy 205.86261 74.9455)
(xy 205.64939 74.9455) (xy 205.439804 74.984678) (xy 205.24098 75.061702) (xy 205.240975 75.061705)
(xy 205.059699 75.173946) (xy 205.059692 75.173952) (xy 204.902135 75.317586) (xy 204.902131 75.317589)
(xy 204.902128 75.317593) (xy 204.902125 75.317597) (xy 204.773635 75.487743) (xy 204.77363 75.487752)
(xy 204.697964 75.639712) (xy 204.678595 75.678611) (xy 204.666655 75.720574) (xy 204.620244 75.883688)
(xy 204.600571 76.096) (xy 204.620244 76.308311) (xy 204.626734 76.331119) (xy 204.624473 76.392263)
(xy 204.590883 76.437433) (xy 204.475186 76.524138) (xy 204.417282 76.543905) (xy 204.358818 76.525862)
(xy 204.322125 76.476899) (xy 204.320596 76.417823) (xy 204.351756 76.30831) (xy 204.371429 76.096)
(xy 204.351756 75.88369) (xy 204.293405 75.678611) (xy 204.198366 75.487745) (xy 204.069872 75.317593)
(xy 203.983372 75.238737) (xy 203.912307 75.173952) (xy 203.9123 75.173946) (xy 203.731024 75.061705)
(xy 203.731019 75.061702) (xy 203.611424 75.015371) (xy 203.532198 74.984679) (xy 203.532197 74.984678)
(xy 203.532195 74.984678) (xy 203.32261 74.9455) (xy 203.10939 74.9455) (xy 202.899804 74.984678)
(xy 202.70098 75.061702) (xy 202.700975 75.061705) (xy 202.519699 75.173946) (xy 202.519692 75.173952)
(xy 202.362135 75.317586) (xy 202.362131 75.317589) (xy 202.362128 75.317593) (xy 202.362125 75.317597)
(xy 202.233635 75.487743) (xy 202.23363 75.487752) (xy 202.157964 75.639712) (xy 202.138595 75.678611)
(xy 202.126655 75.720574) (xy 202.080244 75.883688) (xy 202.060571 76.096) (xy 202.080244 76.308311)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 202.082019 76.314548) (xy 202.079755 76.375692) (xy 202.045038 76.421693) (xy 201.942144 76.496549)
(xy 201.883965 76.515493) (xy 201.825763 76.496622) (xy 201.789768 76.447145) (xy 201.788683 76.389401)
(xy 201.811756 76.30831) (xy 201.831429 76.096) (xy 201.811756 75.88369) (xy 201.753405 75.678611)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 201.658366 75.487745) (xy 201.529872 75.317593) (xy 201.443372 75.238737) (xy 201.372307 75.173952)
(xy 201.3723 75.173946) (xy 201.191024 75.061705) (xy 201.191019 75.061702) (xy 201.071424 75.015371)
(xy 200.992198 74.984679) (xy 200.992197 74.984678) (xy 200.992195 74.984678) (xy 200.78261 74.9455)
(xy 200.56939 74.9455) (xy 200.359804 74.984678) (xy 200.16098 75.061702) (xy 200.160975 75.061705)
(xy 199.979699 75.173946) (xy 199.979692 75.173952) (xy 199.822135 75.317586) (xy 199.822131 75.317589)
(xy 199.822128 75.317593) (xy 199.822125 75.317597) (xy 199.693635 75.487743) (xy 199.69363 75.487752)
(xy 199.617964 75.639712) (xy 199.598595 75.678611) (xy 199.586655 75.720574) (xy 199.540244 75.883688)
(xy 199.520571 76.096) (xy 199.540244 76.308312) (xy 199.540245 76.308317) (xy 199.540619 76.309629)
(xy 199.540597 76.3102) (xy 199.541086 76.312812) (xy 199.540496 76.312922) (xy 199.538353 76.370772)
(xy 199.503299 76.417015) (xy 199.404168 76.488495) (xy 199.345909 76.507193) (xy 199.287787 76.488077)
(xy 199.252001 76.438448) (xy 199.251044 76.381103) (xy 199.271756 76.30831) (xy 199.291429 76.096)
(xy 199.271756 75.88369) (xy 199.213405 75.678611) (xy 199.118366 75.487745) (xy 198.989872 75.317593)
(xy 198.903372 75.238737) (xy 198.832307 75.173952) (xy 198.8323 75.173946) (xy 198.651024 75.061705)
(xy 198.651019 75.061702) (xy 198.531424 75.015371) (xy 198.452198 74.984679) (xy 198.452197 74.984678)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 198.452195 74.984678) (xy 198.24261 74.9455) (xy 198.02939 74.9455) (xy 197.819804 74.984678)
(xy 197.62098 75.061702) (xy 197.620975 75.061705) (xy 197.439699 75.173946) (xy 197.439692 75.173952)
(xy 197.282135 75.317586) (xy 197.282131 75.317589) (xy 197.282128 75.317593) (xy 197.282125 75.317597)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 197.153635 75.487743) (xy 197.15363 75.487752) (xy 197.077964 75.639712) (xy 197.058595 75.678611)
(xy 197.046655 75.720574) (xy 197.000244 75.883688) (xy 197.000244 75.88369) (xy 196.980571 76.096)
(xy 197.000244 76.30831) (xy 197.000245 76.308312) (xy 197.000245 76.308313) (xy 197.001473 76.312629)
(xy 196.999213 76.373773) (xy 196.964362 76.419875) (xy 196.862932 76.493411) (xy 196.804722 76.512259)
(xy 196.746551 76.493293) (xy 196.710637 76.443756) (xy 196.709603 76.386168) (xy 196.731756 76.30831)
(xy 196.751429 76.096) (xy 196.731756 75.88369) (xy 196.673405 75.678611) (xy 196.578366 75.487745)
(xy 196.449872 75.317593) (xy 196.363372 75.238737) (xy 196.292307 75.173952) (xy 196.2923 75.173946)
(xy 196.111024 75.061705) (xy 196.111019 75.061702) (xy 195.991424 75.015371) (xy 195.912198 74.984679)
(xy 195.912197 74.984678) (xy 195.912195 74.984678) (xy 195.70261 74.9455) (xy 195.48939 74.9455)
(xy 195.279804 74.984678) (xy 195.08098 75.061702) (xy 195.080975 75.061705) (xy 194.899699 75.173946)
(xy 194.899692 75.173952) (xy 194.742135 75.317586) (xy 194.742131 75.317589) (xy 194.742128 75.317593)
(xy 194.742125 75.317597) (xy 194.613635 75.487743) (xy 194.61363 75.487752) (xy 194.537964 75.639712)
(xy 194.518595 75.678611) (xy 194.506655 75.720574) (xy 194.460244 75.883688) (xy 194.440571 76.096)
(xy 194.460244 76.308312) (xy 194.460246 76.30832) (xy 194.465099 76.325377) (xy 194.462837 76.38652)
(xy 194.428859 76.431979) (xy 194.317624 76.514492) (xy 194.259624 76.533975) (xy 194.201249 76.515645)
(xy 194.164796 76.466504) (xy 194.163423 76.407888) (xy 194.191756 76.30831) (xy 194.211429 76.096)
(xy 194.191756 75.88369) (xy 194.133405 75.678611) (xy 194.038366 75.487745) (xy 193.909872 75.317593)
(xy 193.823372 75.238737) (xy 193.752307 75.173952) (xy 193.7523 75.173946) (xy 193.571024 75.061705)
(xy 193.571019 75.061702) (xy 193.451424 75.015371) (xy 193.372198 74.984679) (xy 193.372197 74.984678)
(xy 193.372195 74.984678) (xy 193.16261 74.9455) (xy 192.94939 74.9455) (xy 192.739804 74.984678)
(xy 192.54098 75.061702) (xy 192.540975 75.061705) (xy 192.359699 75.173946) (xy 192.359692 75.173952)
(xy 192.202135 75.317586) (xy 192.202131 75.317589) (xy 192.202128 75.317593) (xy 192.202125 75.317597)
(xy 192.073635 75.487743) (xy 192.07363 75.487752) (xy 191.997964 75.639712) (xy 191.978595 75.678611)
(xy 191.966655 75.720574) (xy 191.920244 75.883688) (xy 191.900571 76.096) (xy 191.920244 76.308311)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 191.928222 76.336348) (xy 191.925961 76.397492) (xy 191.892725 76.442395) (xy 191.77294 76.533002)
(xy 191.715127 76.553027) (xy 191.656582 76.535244) (xy 191.619671 76.486446) (xy 191.617998 76.426954)
(xy 191.651756 76.30831) (xy 191.671429 76.096) (xy 191.651756 75.88369) (xy 191.593405 75.678611)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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(xy 188.371424 75.015371) (xy 188.292198 74.984679) (xy 188.292197 74.984678) (xy 188.292195 74.984678)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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(xy 119.318164 83.196501) (xy 119.431934 83.236311) (xy 119.431938 83.236312) (xy 119.431941 83.236313)
(xy 119.431942 83.236313) (xy 119.431946 83.236314) (xy 119.599996 83.255249) (xy 119.6 83.255249)
(xy 119.600004 83.255249) (xy 119.768053 83.236314) (xy 119.768055 83.236313) (xy 119.768059 83.236313)
(xy 119.92769 83.180456) (xy 120.07089 83.090477) (xy 120.190477 82.97089) (xy 120.19048 82.970884)
(xy 120.193941 82.966546) (xy 120.195104 82.967473) (xy 120.236851 82.932618) (xy 120.273712 82.9255)
(xy 126.336016 82.9255) (xy 126.336018 82.9255) (xy 126.444237 82.896503) (xy 126.444239 82.896501)
(xy 126.444241 82.896501) (xy 126.473064 82.879859) (xy 126.541263 82.840485) (xy 127.749192 81.632554)
(xy 127.803707 81.604779) (xy 127.864139 81.61435) (xy 127.877385 81.622468) (xy 127.902175 81.640479)
(xy 127.903212 81.641232) (xy 128.057555 81.719873) (xy 128.057557 81.719873) (xy 128.057558 81.719874)
(xy 128.057561 81.719876) (xy 128.222293 81.773401) (xy 128.222297 81.773402) (xy 128.393386 81.8005)
(xy 128.393389 81.8005) (xy 128.566614 81.8005) (xy 128.737702 81.773402) (xy 128.737706 81.773401)
(xy 128.902438 81.719876) (xy 128.90244 81.719874) (xy 128.902445 81.719873) (xy 129.056788 81.641232)
(xy 129.196928 81.539414) (xy 129.319414 81.416928) (xy 129.421232 81.276788) (xy 129.499873 81.122445)
(xy 129.499874 81.12244) (xy 129.499876 81.122438) (xy 129.553401 80.957706) (xy 129.553402 80.957702)
(xy 129.5805 80.786614) (xy 129.5805 79.813385) (xy 129.553402 79.642297) (xy 129.553401 79.642293)
(xy 129.499876 79.477561) (xy 129.499874 79.477558) (xy 129.499873 79.477557) (xy 129.499873 79.477555)
(xy 129.444009 79.367915) (xy 129.421233 79.323213) (xy 129.319137 79.182691) (xy 129.30023 79.1245)
(xy 129.319137 79.066309) (xy 129.368637 79.030345) (xy 129.39923 79.0255) (xy 130.10077 79.0255)
(xy 130.158961 79.044407) (xy 130.194925 79.093907) (xy 130.194925 79.155093) (xy 130.180863 79.182691)
(xy 130.078766 79.323213) (xy 130.000125 79.477558) (xy 130.000123 79.477561) (xy 129.946598 79.642293)
(xy 129.946597 79.642297) (xy 129.9195 79.813385) (xy 129.9195 80.786614) (xy 129.946597 80.957702)
(xy 129.946598 80.957706) (xy 130.000123 81.122438) (xy 130.000125 81.122441) (xy 130.078682 81.276621)
(xy 130.078768 81.276788) (xy 130.180586 81.416928) (xy 130.303072 81.539414) (xy 130.443212 81.641232)
(xy 130.597555 81.719873) (xy 130.597557 81.719873) (xy 130.597558 81.719874) (xy 130.597561 81.719876)
(xy 130.762293 81.773401) (xy 130.762297 81.773402) (xy 130.933386 81.8005) (xy 130.933389 81.8005)
(xy 131.106614 81.8005) (xy 131.277702 81.773402) (xy 131.277706 81.773401) (xy 131.442438 81.719876)
(xy 131.44244 81.719874) (xy 131.442445 81.719873) (xy 131.596788 81.641232) (xy 131.736928 81.539414)
(xy 131.859414 81.416928) (xy 131.961232 81.276788) (xy 132.039873 81.122445) (xy 132.039874 81.12244)
(xy 132.039876 81.122438) (xy 132.093401 80.957706) (xy 132.093402 80.957702) (xy 132.1205 80.786614)
(xy 132.1205 79.813385) (xy 132.102083 79.697107) (xy 132.111654 79.636675) (xy 132.154919 79.59341)
(xy 132.215351 79.583839) (xy 132.269867 79.611616) (xy 132.269868 79.611616) (xy 132.430504 79.772252)
(xy 132.458281 79.826769) (xy 132.4595 79.842256) (xy 132.4595 80.786614) (xy 132.486597 80.957702)
(xy 132.486598 80.957706) (xy 132.540123 81.122438) (xy 132.540125 81.122441) (xy 132.618682 81.276621)
(xy 132.618768 81.276788) (xy 132.720586 81.416928) (xy 132.843072 81.539414) (xy 132.983212 81.641232)
(xy 133.137555 81.719873) (xy 133.137557 81.719873) (xy 133.137558 81.719874) (xy 133.137561 81.719876)
(xy 133.302293 81.773401) (xy 133.302297 81.773402) (xy 133.473386 81.8005) (xy 133.473389 81.8005)
(xy 133.646614 81.8005) (xy 133.817702 81.773402) (xy 133.817706 81.773401) (xy 133.982438 81.719876)
(xy 133.98244 81.719874) (xy 133.982445 81.719873) (xy 134.136788 81.641232) (xy 134.276928 81.539414)
(xy 134.399414 81.416928) (xy 134.501232 81.276788) (xy 134.579873 81.122445) (xy 134.579874 81.12244)
(xy 134.579876 81.122438) (xy 134.633401 80.957706) (xy 134.633402 80.957702) (xy 134.6605 80.786614)
(xy 134.6605 79.813385) (xy 134.633402 79.642297) (xy 134.633401 79.642293) (xy 134.579876 79.477561)
(xy 134.579874 79.477558) (xy 134.579873 79.477557) (xy 134.579873 79.477555) (xy 134.501232 79.323212)
(xy 134.399414 79.183072) (xy 134.276928 79.060586) (xy 134.136788 78.958768) (xy 134.136787 78.958767)
(xy 134.136785 78.958766) (xy 133.982441 78.880125) (xy 133.982438 78.880123) (xy 133.817706 78.826598)
(xy 133.817702 78.826597) (xy 133.646614 78.7995) (xy 133.646611 78.7995) (xy 133.473389 78.7995)
(xy 133.473386 78.7995) (xy 133.302297 78.826597) (xy 133.302293 78.826598) (xy 133.137561 78.880123)
(xy 133.137558 78.880125) (xy 132.983213 78.958767) (xy 132.983211 78.958768) (xy 132.966533 78.970886)
(xy 132.957387 78.977531) (xy 132.957384 78.977533) (xy 132.899193 78.996439) (xy 132.841003 78.977531)
(xy 132.829191 78.967443) (xy 132.497506 78.635758) (xy 132.361743 78.499995) (xy 151.144751 78.499995)
(xy 151.144751 78.500004) (xy 151.163685 78.668053) (xy 151.163688 78.668065) (xy 151.219544 78.82769)
(xy 151.219544 78.827691) (xy 151.307357 78.967443) (xy 151.309523 78.97089) (xy 151.42911 79.090477)
(xy 151.429112 79.090478) (xy 151.429113 79.090479) (xy 151.572306 79.180454) (xy 151.572307 79.180454)
(xy 151.57231 79.180456) (xy 151.671562 79.215185) (xy 151.720241 79.25225) (xy 151.737838 79.31085)
(xy 151.71763 79.368602) (xy 151.708867 79.378632) (xy 151.6875 79.399999) (xy 151.6875 81.599999)
(xy 151.687501 81.6) (xy 151.815637 81.6) (xy 151.852489 81.5971) (xy 152.0102 81.55128) (xy 152.010201 81.55128)
(xy 152.151552 81.467685) (xy 152.267685 81.351552) (xy 152.35128 81.210201) (xy 152.351281 81.210199)
(xy 152.359329 81.182498) (xy 152.393719 81.131893) (xy 152.451287 81.111166) (xy 152.510043 81.128235)
(xy 152.546495 81.173797) (xy 152.565639 81.222342) (xy 152.657078 81.342922) (xy 152.777658 81.434361)
(xy 152.777659 81.434361) (xy 152.77766 81.434362) (xy 152.827398 81.453976) (xy 152.918436 81.489877)
(xy 153.006898 81.5005) (xy 153.0069 81.5005) (xy 153.6181 81.5005) (xy 153.618102 81.5005) (xy 153.706564 81.489877)
(xy 153.847342 81.434361) (xy 153.967922 81.342922) (xy 154.059361 81.222342) (xy 154.114877 81.081564)
(xy 154.1255 80.993102) (xy 154.1255 80.017254) (xy 154.144407 79.959063) (xy 154.154497 79.94725)
(xy 154.350196 79.751552) (xy 154.547252 79.554496) (xy 154.601768 79.526719) (xy 154.617255 79.5255)
(xy 155.0431 79.5255) (xy 155.043102 79.5255) (xy 155.131564 79.514877) (xy 155.272342 79.459361)
(xy 155.392922 79.367922) (xy 155.393658 79.36695) (xy 155.395382 79.364679) (xy 155.445609 79.329738)
(xy 155.474264 79.3255) (xy 156.22595 79.3255) (xy 156.284141 79.344407) (xy 156.320105 79.393907)
(xy 156.322986 79.407891) (xy 156.323404 79.407813) (xy 156.324244 79.41231) (xy 156.380952 79.611616)
(xy 156.382596 79.617391) (xy 156.451823 79.75642) (xy 156.477634 79.808255) (xy 156.606128 79.978407)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 156.634494 80.004266) (xy 156.763692 80.122047) (xy 156.763699 80.122053) (xy 156.867389 80.186255)
(xy 156.944981 80.234298) (xy 157.143802 80.311321) (xy 157.35339 80.3505) (xy 157.56661 80.3505)
(xy 157.776198 80.311321) (xy 157.975019 80.234298) (xy 158.156302 80.122052) (xy 158.313872 79.978407)
(xy 158.442366 79.808255) (xy 158.537405 79.617389) (xy 158.595756 79.41231) (xy 158.615429 79.2)
(xy 158.595756 78.98769) (xy 158.537405 78.782611) (xy 158.442366 78.591745) (xy 158.313872 78.421593)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 158.222984 78.338737) (xy 158.186119 78.30513) (xy 158.8495 78.30513) (xy 158.8495 80.09486)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 158.849501 80.094863) (xy 158.852414 80.11999) (xy 158.861161 80.139799) (xy 158.897794 80.222765)
(xy 158.977235 80.302206) (xy 159.080009 80.347585) (xy 159.105135 80.3505) (xy 160.894864 80.350499)
(xy 160.919991 80.347585) (xy 161.022765 80.302206) (xy 161.102206 80.222765) (xy 161.147585 80.119991)
(xy 161.1505 80.094865) (xy 161.150499 78.305136) (xy 161.147585 78.280009) (xy 161.102206 78.177235)
(xy 161.022765 78.097794) (xy 160.919991 78.052415) (xy 160.91999 78.052414) (xy 160.919988 78.052414)
(xy 160.894868 78.0495) (xy 159.105139 78.0495) (xy 159.105136 78.049501) (xy 159.080009 78.052414)
(xy 158.977235 78.097794) (xy 158.897794 78.177235) (xy 158.852414 78.280011) (xy 158.8495 78.30513)
(xy 158.186119 78.30513) (xy 158.156307 78.277952) (xy 158.1563 78.277946) (xy 157.975024 78.165705)
(xy 157.975023 78.165704) (xy 157.975019 78.165702) (xy 157.968364 78.163124) (xy 157.948735 78.155519)
(xy 157.901305 78.116866) (xy 157.8855 78.063205) (xy 157.8855 77.24674) (xy 157.904407 77.188549)
(xy 157.948739 77.154425) (xy 158.01101 77.130302) (xy 158.011014 77.130299) (xy 158.011019 77.130298)
(xy 158.192302 77.018052) (xy 158.349872 76.874407) (xy 158.478366 76.704255) (xy 158.573405 76.513389)
(xy 158.631756 76.30831) (xy 158.651429 76.096) (xy 158.880571 76.096) (xy 158.900244 76.308311)
(xy 158.918016 76.370772) (xy 158.958595 76.513389) (xy 159.053634 76.704255) (xy 159.182128 76.874407)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 159.252734 76.938773) (xy 159.339692 77.018047) (xy 159.339699 77.018053) (xy 159.41775 77.06638)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 159.520981 77.130298) (xy 159.719802 77.207321) (xy 159.92939 77.2465) (xy 160.14261 77.2465)
(xy 160.352198 77.207321) (xy 160.551019 77.130298) (xy 160.732302 77.018052) (xy 160.889872 76.874407)
(xy 161.018366 76.704255) (xy 161.113405 76.513389) (xy 161.171756 76.30831) (xy 161.191429 76.096)
(xy 161.420571 76.096) (xy 161.440244 76.308311) (xy 161.458016 76.370772) (xy 161.498595 76.513389)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 161.593634 76.704255) (xy 161.722128 76.874407) (xy 161.792734 76.938773) (xy 161.879692 77.018047)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 161.879699 77.018053) (xy 161.95775 77.06638) (xy 162.060981 77.130298) (xy 162.259802 77.207321)
(xy 162.46939 77.2465) (xy 162.68261 77.2465) (xy 162.892198 77.207321) (xy 163.091019 77.130298)
(xy 163.272302 77.018052) (xy 163.429872 76.874407) (xy 163.558366 76.704255) (xy 163.653405 76.513389)
(xy 163.711756 76.30831) (xy 163.731429 76.096) (xy 163.960571 76.096) (xy 163.980244 76.308311)
(xy 163.998016 76.370772) (xy 164.038595 76.513389) (xy 164.133634 76.704255) (xy 164.262128 76.874407)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 164.332734 76.938773) (xy 164.419692 77.018047) (xy 164.419699 77.018053) (xy 164.49775 77.06638)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 164.600981 77.130298) (xy 164.799802 77.207321) (xy 165.00939 77.2465) (xy 165.22261 77.2465)
(xy 165.432198 77.207321) (xy 165.631019 77.130298) (xy 165.812302 77.018052) (xy 165.969872 76.874407)
(xy 166.098366 76.704255) (xy 166.193405 76.513389) (xy 166.251756 76.30831) (xy 166.271429 76.096)
(xy 166.500571 76.096) (xy 166.520244 76.308311) (xy 166.538016 76.370772) (xy 166.578595 76.513389)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 166.673634 76.704255) (xy 166.802128 76.874407) (xy 166.872734 76.938773) (xy 166.959692 77.018047)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 166.959699 77.018053) (xy 167.03775 77.06638) (xy 167.140981 77.130298) (xy 167.339802 77.207321)
(xy 167.54939 77.2465) (xy 167.76261 77.2465) (xy 167.972198 77.207321) (xy 168.171019 77.130298)
(xy 168.352302 77.018052) (xy 168.509872 76.874407) (xy 168.638366 76.704255) (xy 168.733405 76.513389)
(xy 168.791756 76.30831) (xy 168.811429 76.096) (xy 169.040571 76.096) (xy 169.060244 76.308311)
(xy 169.078016 76.370772) (xy 169.118595 76.513389) (xy 169.213634 76.704255) (xy 169.342128 76.874407)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 169.412734 76.938773) (xy 169.499692 77.018047) (xy 169.499699 77.018053) (xy 169.57775 77.06638)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 169.680981 77.130298) (xy 169.879802 77.207321) (xy 170.08939 77.2465) (xy 170.30261 77.2465)
(xy 170.512198 77.207321) (xy 170.711019 77.130298) (xy 170.892302 77.018052) (xy 171.049872 76.874407)
(xy 171.178366 76.704255) (xy 171.273405 76.513389) (xy 171.331756 76.30831) (xy 171.351429 76.096)
(xy 171.580571 76.096) (xy 171.600244 76.308311) (xy 171.618016 76.370772) (xy 171.658595 76.513389)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 171.753634 76.704255) (xy 171.882128 76.874407) (xy 171.952734 76.938773) (xy 172.039692 77.018047)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 172.039699 77.018053) (xy 172.11775 77.06638) (xy 172.220981 77.130298) (xy 172.419802 77.207321)
(xy 172.62939 77.2465) (xy 172.84261 77.2465) (xy 173.052198 77.207321) (xy 173.251019 77.130298)
(xy 173.432302 77.018052) (xy 173.589872 76.874407) (xy 173.718366 76.704255) (xy 173.813405 76.513389)
(xy 173.871756 76.30831) (xy 173.891429 76.096) (xy 174.120571 76.096) (xy 174.140244 76.308311)
(xy 174.158016 76.370772) (xy 174.198595 76.513389) (xy 174.293634 76.704255) (xy 174.422128 76.874407)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 174.492734 76.938773) (xy 174.579692 77.018047) (xy 174.579699 77.018053) (xy 174.65775 77.06638)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 174.760981 77.130298) (xy 174.959802 77.207321) (xy 175.16939 77.2465) (xy 175.38261 77.2465)
(xy 175.592198 77.207321) (xy 175.791019 77.130298) (xy 175.972302 77.018052) (xy 176.129872 76.874407)
(xy 176.258366 76.704255) (xy 176.353405 76.513389) (xy 176.411756 76.30831) (xy 176.431429 76.096)
(xy 176.660571 76.096) (xy 176.680244 76.308311) (xy 176.698016 76.370772) (xy 176.738595 76.513389)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 176.833634 76.704255) (xy 176.962128 76.874407) (xy 177.032734 76.938773) (xy 177.119692 77.018047)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 177.119699 77.018053) (xy 177.19775 77.06638) (xy 177.300981 77.130298) (xy 177.499802 77.207321)
(xy 177.70939 77.2465) (xy 177.92261 77.2465) (xy 178.132198 77.207321) (xy 178.331019 77.130298)
(xy 178.512302 77.018052) (xy 178.669872 76.874407) (xy 178.798366 76.704255) (xy 178.893405 76.513389)
(xy 178.951756 76.30831) (xy 178.971429 76.096) (xy 179.200571 76.096) (xy 179.220244 76.308311)
(xy 179.238016 76.370772) (xy 179.278595 76.513389) (xy 179.373634 76.704255) (xy 179.502128 76.874407)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 179.572734 76.938773) (xy 179.659692 77.018047) (xy 179.659699 77.018053) (xy 179.73775 77.06638)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 179.840981 77.130298) (xy 180.039802 77.207321) (xy 180.24939 77.2465) (xy 180.46261 77.2465)
(xy 180.672198 77.207321) (xy 180.871019 77.130298) (xy 181.052302 77.018052) (xy 181.209872 76.874407)
(xy 181.338366 76.704255) (xy 181.433405 76.513389) (xy 181.491756 76.30831) (xy 181.511429 76.096)
(xy 181.740571 76.096) (xy 181.760244 76.308311) (xy 181.778016 76.370772) (xy 181.818595 76.513389)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 181.913634 76.704255) (xy 182.042128 76.874407) (xy 182.112734 76.938773) (xy 182.199692 77.018047)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 182.199699 77.018053) (xy 182.27775 77.06638) (xy 182.380981 77.130298) (xy 182.579802 77.207321)
(xy 182.78939 77.2465) (xy 183.00261 77.2465) (xy 183.212198 77.207321) (xy 183.411019 77.130298)
(xy 183.592302 77.018052) (xy 183.749872 76.874407) (xy 183.878366 76.704255) (xy 183.973405 76.513389)
(xy 184.031756 76.30831) (xy 184.051429 76.096) (xy 184.280571 76.096) (xy 184.300244 76.308311)
(xy 184.318016 76.370772) (xy 184.358595 76.513389) (xy 184.453634 76.704255) (xy 184.582128 76.874407)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 184.652734 76.938773) (xy 184.739692 77.018047) (xy 184.739699 77.018053) (xy 184.81775 77.06638)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 184.920981 77.130298) (xy 185.119802 77.207321) (xy 185.32939 77.2465) (xy 185.54261 77.2465)
(xy 185.752198 77.207321) (xy 185.951019 77.130298) (xy 186.132302 77.018052) (xy 186.289872 76.874407)
(xy 186.418366 76.704255) (xy 186.513405 76.513389) (xy 186.571756 76.30831) (xy 186.591429 76.096)
(xy 186.571756 75.88369) (xy 186.513405 75.678611) (xy 186.418366 75.487745) (xy 186.289872 75.317593)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 186.203372 75.238737) (xy 186.132307 75.173952) (xy 186.1323 75.173946) (xy 185.951024 75.061705)
(xy 185.951019 75.061702) (xy 185.831424 75.015371) (xy 185.752198 74.984679) (xy 185.752197 74.984678)
(xy 185.752195 74.984678) (xy 185.54261 74.9455) (xy 185.32939 74.9455) (xy 185.119804 74.984678)
(xy 184.92098 75.061702) (xy 184.920975 75.061705) (xy 184.739699 75.173946) (xy 184.739692 75.173952)
(xy 184.582135 75.317586) (xy 184.582131 75.317589) (xy 184.582128 75.317593) (xy 184.582125 75.317597)
(xy 184.453635 75.487743) (xy 184.45363 75.487752) (xy 184.377964 75.639712) (xy 184.358595 75.678611)
(xy 184.346655 75.720574) (xy 184.300244 75.883688) (xy 184.280571 76.096) (xy 184.051429 76.096)
(xy 184.031756 75.88369) (xy 183.973405 75.678611) (xy 183.878366 75.487745) (xy 183.749872 75.317593)
(xy 183.663372 75.238737) (xy 183.592307 75.173952) (xy 183.5923 75.173946) (xy 183.411024 75.061705)
(xy 183.411019 75.061702) (xy 183.291424 75.015371) (xy 183.212198 74.984679) (xy 183.212197 74.984678)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 183.212195 74.984678) (xy 183.00261 74.9455) (xy 182.78939 74.9455) (xy 182.579804 74.984678)
(xy 182.38098 75.061702) (xy 182.380975 75.061705) (xy 182.199699 75.173946) (xy 182.199692 75.173952)
(xy 182.042135 75.317586) (xy 182.042131 75.317589) (xy 182.042128 75.317593) (xy 182.042125 75.317597)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 181.913635 75.487743) (xy 181.91363 75.487752) (xy 181.837964 75.639712) (xy 181.818595 75.678611)
(xy 181.806655 75.720574) (xy 181.760244 75.883688) (xy 181.740571 76.096) (xy 181.511429 76.096)
(xy 181.491756 75.88369) (xy 181.433405 75.678611) (xy 181.338366 75.487745) (xy 181.209872 75.317593)
(xy 181.123372 75.238737) (xy 181.052307 75.173952) (xy 181.0523 75.173946) (xy 180.871024 75.061705)
(xy 180.871019 75.061702) (xy 180.751424 75.015371) (xy 180.672198 74.984679) (xy 180.672197 74.984678)
(xy 180.672195 74.984678) (xy 180.46261 74.9455) (xy 180.24939 74.9455) (xy 180.039804 74.984678)
(xy 179.84098 75.061702) (xy 179.840975 75.061705) (xy 179.659699 75.173946) (xy 179.659692 75.173952)
(xy 179.502135 75.317586) (xy 179.502131 75.317589) (xy 179.502128 75.317593) (xy 179.502125 75.317597)
(xy 179.373635 75.487743) (xy 179.37363 75.487752) (xy 179.297964 75.639712) (xy 179.278595 75.678611)
(xy 179.266655 75.720574) (xy 179.220244 75.883688) (xy 179.200571 76.096) (xy 178.971429 76.096)
(xy 178.951756 75.88369) (xy 178.893405 75.678611) (xy 178.798366 75.487745) (xy 178.669872 75.317593)
(xy 178.583372 75.238737) (xy 178.512307 75.173952) (xy 178.5123 75.173946) (xy 178.331024 75.061705)
(xy 178.331019 75.061702) (xy 178.211424 75.015371) (xy 178.132198 74.984679) (xy 178.132197 74.984678)
(xy 178.132195 74.984678) (xy 177.92261 74.9455) (xy 177.70939 74.9455) (xy 177.499804 74.984678)
(xy 177.30098 75.061702) (xy 177.300975 75.061705) (xy 177.119699 75.173946) (xy 177.119692 75.173952)
(xy 176.962135 75.317586) (xy 176.962131 75.317589) (xy 176.962128 75.317593) (xy 176.962125 75.317597)
(xy 176.833635 75.487743) (xy 176.83363 75.487752) (xy 176.757964 75.639712) (xy 176.738595 75.678611)
(xy 176.726655 75.720574) (xy 176.680244 75.883688) (xy 176.660571 76.096) (xy 176.431429 76.096)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 176.411756 75.88369) (xy 176.353405 75.678611) (xy 176.258366 75.487745) (xy 176.129872 75.317593)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 176.043372 75.238737) (xy 175.972307 75.173952) (xy 175.9723 75.173946) (xy 175.791024 75.061705)
(xy 175.791019 75.061702) (xy 175.671424 75.015371) (xy 175.592198 74.984679) (xy 175.592197 74.984678)
(xy 175.592195 74.984678) (xy 175.38261 74.9455) (xy 175.16939 74.9455) (xy 174.959804 74.984678)
(xy 174.76098 75.061702) (xy 174.760975 75.061705) (xy 174.579699 75.173946) (xy 174.579692 75.173952)
(xy 174.422135 75.317586) (xy 174.422131 75.317589) (xy 174.422128 75.317593) (xy 174.422125 75.317597)
(xy 174.293635 75.487743) (xy 174.29363 75.487752) (xy 174.217964 75.639712) (xy 174.198595 75.678611)
(xy 174.186655 75.720574) (xy 174.140244 75.883688) (xy 174.120571 76.096) (xy 173.891429 76.096)
(xy 173.871756 75.88369) (xy 173.813405 75.678611) (xy 173.718366 75.487745) (xy 173.589872 75.317593)
(xy 173.503372 75.238737) (xy 173.432307 75.173952) (xy 173.4323 75.173946) (xy 173.251024 75.061705)
(xy 173.251019 75.061702) (xy 173.131424 75.015371) (xy 173.052198 74.984679) (xy 173.052197 74.984678)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 173.052195 74.984678) (xy 172.84261 74.9455) (xy 172.62939 74.9455) (xy 172.419804 74.984678)
(xy 172.22098 75.061702) (xy 172.220975 75.061705) (xy 172.039699 75.173946) (xy 172.039692 75.173952)
(xy 171.882135 75.317586) (xy 171.882131 75.317589) (xy 171.882128 75.317593) (xy 171.882125 75.317597)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 171.753635 75.487743) (xy 171.75363 75.487752) (xy 171.677964 75.639712) (xy 171.658595 75.678611)
(xy 171.646655 75.720574) (xy 171.600244 75.883688) (xy 171.580571 76.096) (xy 171.351429 76.096)
(xy 171.331756 75.88369) (xy 171.273405 75.678611) (xy 171.178366 75.487745) (xy 171.049872 75.317593)
(xy 170.963372 75.238737) (xy 170.892307 75.173952) (xy 170.8923 75.173946) (xy 170.711024 75.061705)
(xy 170.711019 75.061702) (xy 170.591424 75.015371) (xy 170.512198 74.984679) (xy 170.512197 74.984678)
(xy 170.512195 74.984678) (xy 170.30261 74.9455) (xy 170.08939 74.9455) (xy 169.879804 74.984678)
(xy 169.68098 75.061702) (xy 169.680975 75.061705) (xy 169.499699 75.173946) (xy 169.499692 75.173952)
(xy 169.342135 75.317586) (xy 169.342131 75.317589) (xy 169.342128 75.317593) (xy 169.342125 75.317597)
(xy 169.213635 75.487743) (xy 169.21363 75.487752) (xy 169.137964 75.639712) (xy 169.118595 75.678611)
(xy 169.106655 75.720574) (xy 169.060244 75.883688) (xy 169.040571 76.096) (xy 168.811429 76.096)
(xy 168.791756 75.88369) (xy 168.733405 75.678611) (xy 168.638366 75.487745) (xy 168.509872 75.317593)
(xy 168.423372 75.238737) (xy 168.352307 75.173952) (xy 168.3523 75.173946) (xy 168.171024 75.061705)
(xy 168.171019 75.061702) (xy 168.051424 75.015371) (xy 167.972198 74.984679) (xy 167.972197 74.984678)
(xy 167.972195 74.984678) (xy 167.76261 74.9455) (xy 167.54939 74.9455) (xy 167.339804 74.984678)
(xy 167.14098 75.061702) (xy 167.140975 75.061705) (xy 166.959699 75.173946) (xy 166.959692 75.173952)
(xy 166.802135 75.317586) (xy 166.802131 75.317589) (xy 166.802128 75.317593) (xy 166.802125 75.317597)
(xy 166.673635 75.487743) (xy 166.67363 75.487752) (xy 166.597964 75.639712) (xy 166.578595 75.678611)
(xy 166.566655 75.720574) (xy 166.520244 75.883688) (xy 166.500571 76.096) (xy 166.271429 76.096)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 166.251756 75.88369) (xy 166.193405 75.678611) (xy 166.098366 75.487745) (xy 165.969872 75.317593)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 165.883372 75.238737) (xy 165.812307 75.173952) (xy 165.8123 75.173946) (xy 165.631024 75.061705)
(xy 165.631019 75.061702) (xy 165.511424 75.015371) (xy 165.432198 74.984679) (xy 165.432197 74.984678)
(xy 165.432195 74.984678) (xy 165.22261 74.9455) (xy 165.00939 74.9455) (xy 164.799804 74.984678)
(xy 164.60098 75.061702) (xy 164.600975 75.061705) (xy 164.419699 75.173946) (xy 164.419692 75.173952)
(xy 164.262135 75.317586) (xy 164.262131 75.317589) (xy 164.262128 75.317593) (xy 164.262125 75.317597)
(xy 164.133635 75.487743) (xy 164.13363 75.487752) (xy 164.057964 75.639712) (xy 164.038595 75.678611)
(xy 164.026655 75.720574) (xy 163.980244 75.883688) (xy 163.960571 76.096) (xy 163.731429 76.096)
(xy 163.711756 75.88369) (xy 163.653405 75.678611) (xy 163.558366 75.487745) (xy 163.429872 75.317593)
(xy 163.343372 75.238737) (xy 163.272307 75.173952) (xy 163.2723 75.173946) (xy 163.091024 75.061705)
(xy 163.091019 75.061702) (xy 162.971424 75.015371) (xy 162.892198 74.984679) (xy 162.892197 74.984678)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 162.892195 74.984678) (xy 162.68261 74.9455) (xy 162.46939 74.9455) (xy 162.259804 74.984678)
(xy 162.06098 75.061702) (xy 162.060975 75.061705) (xy 161.879699 75.173946) (xy 161.879692 75.173952)
(xy 161.722135 75.317586) (xy 161.722131 75.317589) (xy 161.722128 75.317593) (xy 161.722125 75.317597)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 161.593635 75.487743) (xy 161.59363 75.487752) (xy 161.517964 75.639712) (xy 161.498595 75.678611)
(xy 161.486655 75.720574) (xy 161.440244 75.883688) (xy 161.420571 76.096) (xy 161.191429 76.096)
(xy 161.171756 75.88369) (xy 161.113405 75.678611) (xy 161.018366 75.487745) (xy 160.889872 75.317593)
(xy 160.803372 75.238737) (xy 160.732307 75.173952) (xy 160.7323 75.173946) (xy 160.551024 75.061705)
(xy 160.551019 75.061702) (xy 160.431424 75.015371) (xy 160.352198 74.984679) (xy 160.352197 74.984678)
(xy 160.352195 74.984678) (xy 160.14261 74.9455) (xy 159.92939 74.9455) (xy 159.719804 74.984678)
(xy 159.52098 75.061702) (xy 159.520975 75.061705) (xy 159.339699 75.173946) (xy 159.339692 75.173952)
(xy 159.182135 75.317586) (xy 159.182131 75.317589) (xy 159.182128 75.317593) (xy 159.182125 75.317597)
(xy 159.053635 75.487743) (xy 159.05363 75.487752) (xy 158.977964 75.639712) (xy 158.958595 75.678611)
(xy 158.946655 75.720574) (xy 158.900244 75.883688) (xy 158.880571 76.096) (xy 158.651429 76.096)
(xy 158.631756 75.88369) (xy 158.573405 75.678611) (xy 158.478366 75.487745) (xy 158.349872 75.317593)
(xy 158.263372 75.238737) (xy 158.192307 75.173952) (xy 158.1923 75.173946) (xy 158.011024 75.061705)
(xy 158.011019 75.061702) (xy 157.891424 75.015371) (xy 157.812198 74.984679) (xy 157.812197 74.984678)
(xy 157.812195 74.984678) (xy 157.60261 74.9455) (xy 157.38939 74.9455) (xy 157.179804 74.984678)
(xy 156.98098 75.061702) (xy 156.980975 75.061705) (xy 156.799699 75.173946) (xy 156.799692 75.173952)
(xy 156.642135 75.317586) (xy 156.642131 75.317589) (xy 156.642128 75.317593) (xy 156.642125 75.317597)
(xy 156.513635 75.487743) (xy 156.51363 75.487752) (xy 156.437964 75.639712) (xy 156.418595 75.678611)
(xy 156.406655 75.720574) (xy 156.360244 75.883688) (xy 156.340571 76.096) (xy 156.360244 76.308311)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 156.378016 76.370772) (xy 156.418595 76.513389) (xy 156.513634 76.704255) (xy 156.642128 76.874407)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 156.712734 76.938773) (xy 156.799692 77.018047) (xy 156.799699 77.018053) (xy 156.984873 77.132708)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 156.984076 77.133994) (xy 157.023286 77.172478) (xy 157.0345 77.218245) (xy 157.0345 78.063205)
(xy 157.015593 78.121396) (xy 156.971265 78.155519) (xy 156.944983 78.165701) (xy 156.944975 78.165705)
(xy 156.763699 78.277946) (xy 156.763692 78.277952) (xy 156.606135 78.421586) (xy 156.606131 78.421589)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 156.606128 78.421593) (xy 156.606125 78.421596) (xy 156.606123 78.421599) (xy 156.595881 78.435162)
(xy 156.545725 78.470204) (xy 156.516878 78.4745) (xy 155.6495 78.4745) (xy 155.591309 78.455593)
(xy 155.555345 78.406093) (xy 155.5505 78.3755) (xy 155.5505 77.981899) (xy 155.550499 77.981893)
(xy 155.550014 77.977852) (xy 155.539877 77.893436) (xy 155.48783 77.761454) (xy 155.484362 77.75266)
(xy 155.484361 77.752659) (xy 155.484361 77.752658) (xy 155.392922 77.632078) (xy 155.272342 77.540639)
(xy 155.272341 77.540638) (xy 155.272339 77.540637) (xy 155.131565 77.485123) (xy 155.043106 77.4745)
(xy 155.043102 77.4745) (xy 154.456898 77.4745) (xy 154.456893 77.4745) (xy 154.368434 77.485123)
(xy 154.22766 77.540637) (xy 154.227656 77.54064) (xy 154.107081 77.632075) (xy 154.107075 77.632081)
(xy 154.01564 77.752656) (xy 154.015637 77.75266) (xy 153.960123 77.893434) (xy 153.9495 77.981893)
(xy 153.9495 78.907744) (xy 153.930593 78.965935) (xy 153.920504 78.977748) (xy 153.819504 79.078748)
(xy 153.764987 79.106525) (xy 153.704555 79.096954) (xy 153.66129 79.053689) (xy 153.6505 79.008744)
(xy 153.6505 77.981899) (xy 153.650499 77.981893) (xy 153.650014 77.977852) (xy 153.639877 77.893436)
(xy 153.58783 77.761454) (xy 153.584362 77.75266) (xy 153.584361 77.752659) (xy 153.584361 77.752658)
(xy 153.492922 77.632078) (xy 153.372342 77.540639) (xy 153.372341 77.540638) (xy 153.372339 77.540637)
(xy 153.231565 77.485123) (xy 153.143106 77.4745) (xy 153.143102 77.4745) (xy 152.556898 77.4745)
(xy 152.556893 77.4745) (xy 152.468434 77.485123) (xy 152.32766 77.540637) (xy 152.327656 77.54064)
(xy 152.207081 77.632075) (xy 152.207073 77.632083) (xy 152.138207 77.722896) (xy 152.08798 77.757838)
(xy 152.04824 77.761453) (xy 151.9 77.744751) (xy 151.899998 77.744751) (xy 151.899996 77.744751)
(xy 151.731946 77.763685) (xy 151.731934 77.763688) (xy 151.572309 77.819544) (xy 151.572308 77.819544)
(xy 151.429113 77.90952) (xy 151.30952 78.029113) (xy 151.219544 78.172308) (xy 151.219544 78.172309)
(xy 151.163688 78.331934) (xy 151.163685 78.331946) (xy 151.144751 78.499995) (xy 132.361743 78.499995)
(xy 132.121263 78.259515) (xy 132.12126 78.259513) (xy 132.02424 78.203498) (xy 132.024242 78.203498)
(xy 131.982251 78.192247) (xy 131.916018 78.1745) (xy 131.916016 78.1745) (xy 125.317256 78.1745)
(xy 125.259065 78.155593) (xy 125.247252 78.145504) (xy 124.517246 77.415498) (xy 124.489469 77.360981)
(xy 124.49904 77.300549) (xy 124.542305 77.257284) (xy 124.578113 77.246917) (xy 124.582607 77.2465)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 124.58261 77.2465) (xy 124.792198 77.207321) (xy 124.991019 77.130298) (xy 125.172302 77.018052)
(xy 125.329872 76.874407) (xy 125.458366 76.704255) (xy 125.553405 76.513389) (xy 125.611756 76.30831)
(xy 125.631429 76.096) (xy 125.860571 76.096) (xy 125.880244 76.308311) (xy 125.898016 76.370772)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 125.938595 76.513389) (xy 126.033634 76.704255) (xy 126.162128 76.874407) (xy 126.232734 76.938773)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 126.319692 77.018047) (xy 126.319699 77.018053) (xy 126.39775 77.06638) (xy 126.500981 77.130298)
(xy 126.699802 77.207321) (xy 126.90939 77.2465) (xy 127.12261 77.2465) (xy 127.332198 77.207321)
(xy 127.531019 77.130298) (xy 127.712302 77.018052) (xy 127.869872 76.874407) (xy 127.998366 76.704255)
(xy 128.093405 76.513389) (xy 128.151756 76.30831) (xy 128.171429 76.096) (xy 128.400571 76.096)
(xy 128.420244 76.308311) (xy 128.438016 76.370772) (xy 128.478595 76.513389) (xy 128.573634 76.704255)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 128.702128 76.874407) (xy 128.772734 76.938773) (xy 128.859692 77.018047) (xy 128.859699 77.018053)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 128.93775 77.06638) (xy 129.040981 77.130298) (xy 129.239802 77.207321) (xy 129.44939 77.2465)
(xy 129.66261 77.2465) (xy 129.872198 77.207321) (xy 130.071019 77.130298) (xy 130.252302 77.018052)
(xy 130.409872 76.874407) (xy 130.538366 76.704255) (xy 130.633405 76.513389) (xy 130.691756 76.30831)
(xy 130.711429 76.096) (xy 130.940571 76.096) (xy 130.960244 76.308311) (xy 130.978016 76.370772)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 131.018595 76.513389) (xy 131.113634 76.704255) (xy 131.242128 76.874407) (xy 131.312734 76.938773)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 131.399692 77.018047) (xy 131.399699 77.018053) (xy 131.47775 77.06638) (xy 131.580981 77.130298)
(xy 131.779802 77.207321) (xy 131.98939 77.2465) (xy 132.20261 77.2465) (xy 132.412198 77.207321)
(xy 132.611019 77.130298) (xy 132.792302 77.018052) (xy 132.949872 76.874407) (xy 133.078366 76.704255)
(xy 133.173405 76.513389) (xy 133.231756 76.30831) (xy 133.251429 76.096) (xy 133.480571 76.096)
(xy 133.500244 76.308311) (xy 133.518016 76.370772) (xy 133.558595 76.513389) (xy 133.653634 76.704255)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 133.782128 76.874407) (xy 133.852734 76.938773) (xy 133.939692 77.018047) (xy 133.939699 77.018053)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 134.01775 77.06638) (xy 134.120981 77.130298) (xy 134.319802 77.207321) (xy 134.52939 77.2465)
(xy 134.74261 77.2465) (xy 134.952198 77.207321) (xy 135.151019 77.130298) (xy 135.332302 77.018052)
(xy 135.489872 76.874407) (xy 135.618366 76.704255) (xy 135.713405 76.513389) (xy 135.771756 76.30831)
(xy 135.791429 76.096) (xy 136.020571 76.096) (xy 136.040244 76.308311) (xy 136.058016 76.370772)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 136.098595 76.513389) (xy 136.193634 76.704255) (xy 136.322128 76.874407) (xy 136.392734 76.938773)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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(xy 121.082125 72.777597) (xy 120.953635 72.947743) (xy 120.95363 72.947752) (xy 120.858596 73.138608)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 120.800244 73.343688) (xy 120.780571 73.556) (xy 120.800244 73.768311) (xy 120.858596 73.973391)
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(xy 120.378366 74.164255) (xy 120.473405 73.973389) (xy 120.531756 73.76831) (xy 120.551429 73.556)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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2024-09-06 09:21:51 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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2024-09-06 09:21:51 +02:00
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(xy 158.537405 78.782611) (xy 158.442366 78.591745) (xy 158.313872 78.421593) (xy 158.219962 78.335982)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 158.186198 78.305202) (xy 158.85 78.305202) (xy 158.85 78.999999) (xy 158.850001 79) (xy 159.53812 79)
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(xy 158.852909 78.280127) (xy 158.85 78.305202) (xy 158.186198 78.305202) (xy 158.156307 78.277952)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 158.1563 78.277946) (xy 157.975024 78.165705) (xy 157.975019 78.165702) (xy 157.946715 78.154737)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 157.776198 78.088679) (xy 157.776197 78.088678) (xy 157.776195 78.088678) (xy 157.56661 78.0495)
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(xy 156.606128 78.421593) (xy 156.606125 78.421597) (xy 156.477635 78.591743) (xy 156.47763 78.591752)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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(xy 144.330075 76.288993) (xy 144.33412 76.296) (xy 143.659607 76.296) (xy 143.660738 76.308216)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 143.719064 76.51321) (xy 143.814057 76.703983) (xy 143.814062 76.703992) (xy 143.942496 76.874064)
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(xy 145.25788 75.896) (xy 145.932393 75.896) (xy 145.931261 75.883783) (xy 145.872935 75.678789)
(xy 145.777942 75.488016) (xy 145.777937 75.488007) (xy 145.649503 75.317935) (xy 145.649493 75.317924)
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PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
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(xy 137.866309 79.01727) (xy 137.830345 78.967769) (xy 137.8255 78.937177) (xy 137.8255 78.629255)
(xy 137.844407 78.571064) (xy 137.85449 78.559257) (xy 139.214809 77.198937) (xy 139.269324 77.171162)
(xy 139.320573 77.176628) (xy 139.398555 77.206838) (xy 139.399802 77.207321) (xy 139.60939 77.2465)
(xy 139.82261 77.2465) (xy 140.032198 77.207321) (xy 140.231019 77.130298) (xy 140.412302 77.018052)
(xy 140.569872 76.874407) (xy 140.698366 76.704255) (xy 140.793405 76.513389) (xy 140.851756 76.30831)
(xy 140.871429 76.096) (xy 140.851756 75.88369) (xy 140.793405 75.678611) (xy 140.698366 75.487745)
(xy 140.569872 75.317593) (xy 140.442198 75.201202) (xy 140.412307 75.173952) (xy 140.4123 75.173946)
(xy 140.231024 75.061705) (xy 140.231019 75.061702) (xy 140.056808 74.994213) (xy 140.032198 74.984679)
(xy 140.032197 74.984678) (xy 140.032195 74.984678) (xy 139.82261 74.9455) (xy 139.60939 74.9455)
(xy 139.399804 74.984678) (xy 139.20098 75.061702) (xy 139.200975 75.061705) (xy 139.019699 75.173946)
(xy 139.019692 75.173952) (xy 138.862135 75.317586) (xy 138.862131 75.317589) (xy 138.862128 75.317593)
(xy 138.862125 75.317597) (xy 138.733635 75.487743) (xy 138.73363 75.487752) (xy 138.638596 75.678608)
(xy 138.638595 75.678611) (xy 138.626655 75.720574) (xy 138.580244 75.883688) (xy 138.560571 76.096)
(xy 138.580244 76.308311) (xy 138.580247 76.30832) (xy 138.63558 76.502791) (xy 138.633319 76.563933)
(xy 138.610363 76.599887) (xy 137.138737 78.071515) (xy 137.138736 78.071514) (xy 137.059514 78.150737)
(xy 137.003498 78.247758) (xy 136.9745 78.355983) (xy 136.9745 78.98077) (xy 136.955593 79.038961)
(xy 136.906093 79.074925) (xy 136.844907 79.074925) (xy 136.817309 79.060863) (xy 136.816926 79.060585)
(xy 136.776663 79.031332) (xy 136.676786 78.958766) (xy 136.522441 78.880125) (xy 136.522438 78.880123)
(xy 136.357706 78.826598) (xy 136.357702 78.826597) (xy 136.186614 78.7995) (xy 136.186611 78.7995)
(xy 136.013389 78.7995) (xy 136.013386 78.7995) (xy 135.842297 78.826597) (xy 135.842293 78.826598)
(xy 135.677561 78.880123) (xy 135.677558 78.880125) (xy 135.523213 78.958766) (xy 135.413144 79.038737)
(xy 135.383074 79.060585) (xy 135.382691 79.060863) (xy 135.3245 79.07977) (xy 135.266309 79.060863)
(xy 135.230345 79.011363) (xy 135.2255 78.98077) (xy 135.2255 78.689255) (xy 135.244407 78.631064)
(xy 135.25449 78.619257) (xy 136.674809 77.198937) (xy 136.729324 77.171162) (xy 136.780573 77.176628)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 136.858555 77.206838) (xy 136.859802 77.207321) (xy 137.06939 77.2465) (xy 137.28261 77.2465)
(xy 137.492198 77.207321) (xy 137.691019 77.130298) (xy 137.872302 77.018052) (xy 138.029872 76.874407)
(xy 138.158366 76.704255) (xy 138.253405 76.513389) (xy 138.311756 76.30831) (xy 138.331429 76.096)
(xy 138.311756 75.88369) (xy 138.253405 75.678611) (xy 138.158366 75.487745) (xy 138.029872 75.317593)
(xy 137.902198 75.201202) (xy 137.872307 75.173952) (xy 137.8723 75.173946) (xy 137.691024 75.061705)
(xy 137.691019 75.061702) (xy 137.516808 74.994213) (xy 137.492198 74.984679) (xy 137.492197 74.984678)
(xy 137.492195 74.984678) (xy 137.28261 74.9455) (xy 137.06939 74.9455) (xy 136.859804 74.984678)
(xy 136.66098 75.061702) (xy 136.660975 75.061705) (xy 136.479699 75.173946) (xy 136.479692 75.173952)
(xy 136.322135 75.317586) (xy 136.322131 75.317589) (xy 136.322128 75.317593) (xy 136.322125 75.317597)
(xy 136.193635 75.487743) (xy 136.19363 75.487752) (xy 136.098596 75.678608) (xy 136.098595 75.678611)
(xy 136.086655 75.720574) (xy 136.040244 75.883688) (xy 136.020571 76.096) (xy 136.040244 76.308311)
(xy 136.040247 76.30832) (xy 136.09558 76.502791) (xy 136.093319 76.563933) (xy 136.070363 76.599887)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 134.538737 78.131515) (xy 134.538736 78.131514) (xy 134.459514 78.210737) (xy 134.403498 78.307758)
(xy 134.3745 78.415983) (xy 134.3745 78.937177) (xy 134.355593 78.995368) (xy 134.306093 79.031332)
(xy 134.244907 79.031332) (xy 134.217309 79.01727) (xy 134.189178 78.996832) (xy 134.136788 78.958768)
(xy 133.982445 78.880127) (xy 133.982444 78.880126) (xy 133.982441 78.880125) (xy 133.982438 78.880123)
(xy 133.817706 78.826598) (xy 133.817702 78.826597) (xy 133.646614 78.7995) (xy 133.646611 78.7995)
(xy 133.473389 78.7995) (xy 133.473386 78.7995) (xy 133.302297 78.826597) (xy 133.302293 78.826598)
(xy 133.137561 78.880123) (xy 133.137558 78.880125) (xy 132.983212 78.958767) (xy 132.983208 78.958769)
(xy 132.89869 79.020176) (xy 132.8405 79.039083) (xy 132.782309 79.020175) (xy 132.746345 78.970675)
(xy 132.7415 78.940083) (xy 132.7415 78.633255) (xy 132.760407 78.575064) (xy 132.77049 78.563257)
(xy 134.134809 77.198937) (xy 134.189324 77.171162) (xy 134.240573 77.176628) (xy 134.318555 77.206838)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 134.319802 77.207321) (xy 134.52939 77.2465) (xy 134.74261 77.2465) (xy 134.952198 77.207321)
(xy 135.151019 77.130298) (xy 135.332302 77.018052) (xy 135.489872 76.874407) (xy 135.618366 76.704255)
(xy 135.713405 76.513389) (xy 135.771756 76.30831) (xy 135.791429 76.096) (xy 135.771756 75.88369)
(xy 135.713405 75.678611) (xy 135.618366 75.487745) (xy 135.489872 75.317593) (xy 135.362198 75.201202)
(xy 135.332307 75.173952) (xy 135.3323 75.173946) (xy 135.151024 75.061705) (xy 135.151019 75.061702)
(xy 134.976808 74.994213) (xy 134.952198 74.984679) (xy 134.952197 74.984678) (xy 134.952195 74.984678)
(xy 134.74261 74.9455) (xy 134.52939 74.9455) (xy 134.319804 74.984678) (xy 134.12098 75.061702)
(xy 134.120975 75.061705) (xy 133.939699 75.173946) (xy 133.939692 75.173952) (xy 133.782135 75.317586)
(xy 133.782131 75.317589) (xy 133.782128 75.317593) (xy 133.782125 75.317597) (xy 133.653635 75.487743)
(xy 133.65363 75.487752) (xy 133.558596 75.678608) (xy 133.558595 75.678611) (xy 133.546655 75.720574)
(xy 133.500244 75.883688) (xy 133.480571 76.096) (xy 133.500244 76.308311) (xy 133.500247 76.30832)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 133.55558 76.502791) (xy 133.553319 76.563933) (xy 133.530363 76.599887) (xy 132.054737 78.075515)
(xy 132.054736 78.075514) (xy 131.975514 78.154737) (xy 131.919498 78.251758) (xy 131.919497 78.251763)
(xy 131.896931 78.335983) (xy 131.8905 78.359983) (xy 131.8905 78.978481) (xy 131.871593 79.036672)
(xy 131.822093 79.072636) (xy 131.760907 79.072636) (xy 131.73331 79.058574) (xy 131.596528 78.959198)
(xy 131.596524 78.959195) (xy 131.442248 78.880588) (xy 131.277578 78.827084) (xy 131.22 78.817964)
(xy 131.22 79.953589) (xy 131.174394 79.927259) (xy 131.072661 79.9) (xy 130.967339 79.9) (xy 130.865606 79.927259)
(xy 130.82 79.953589) (xy 130.82 78.817965) (xy 130.819999 78.817964) (xy 130.762422 78.827084)
(xy 130.76242 78.827084) (xy 130.597751 78.880588) (xy 130.443475 78.959195) (xy 130.443471 78.959197)
(xy 130.38269 79.003358) (xy 130.324499 79.022265) (xy 130.266309 79.003357) (xy 130.230345 78.953857)
(xy 130.2255 78.923265) (xy 130.2255 78.609254) (xy 130.244407 78.551063) (xy 130.25449 78.539256)
(xy 131.594807 77.198938) (xy 131.649324 77.171162) (xy 131.700573 77.176628) (xy 131.755189 77.197786)
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(xy 132.611019 77.130298) (xy 132.792302 77.018052) (xy 132.949872 76.874407) (xy 133.078366 76.704255)
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(xy 133.173405 75.678611) (xy 133.078366 75.487745) (xy 132.949872 75.317593) (xy 132.822198 75.201202)
(xy 132.792307 75.173952) (xy 132.7923 75.173946) (xy 132.611024 75.061705) (xy 132.611019 75.061702)
(xy 132.436808 74.994213) (xy 132.412198 74.984679) (xy 132.412197 74.984678) (xy 132.412195 74.984678)
(xy 132.20261 74.9455) (xy 131.98939 74.9455) (xy 131.779804 74.984678) (xy 131.58098 75.061702)
(xy 131.580975 75.061705) (xy 131.399699 75.173946) (xy 131.399692 75.173952) (xy 131.242135 75.317586)
(xy 131.242131 75.317589) (xy 131.242128 75.317593) (xy 131.242125 75.317597) (xy 131.113635 75.487743)
(xy 131.11363 75.487752) (xy 131.018596 75.678608) (xy 131.018595 75.678611) (xy 131.006655 75.720574)
(xy 130.960244 75.883688) (xy 130.940571 76.096) (xy 130.960244 76.308311) (xy 130.960247 76.30832)
(xy 131.015579 76.50279) (xy 131.01558 76.502791) (xy 131.013319 76.563935) (xy 130.990363 76.599888)
(xy 130.276258 77.313993) (xy 129.538737 78.051514) (xy 129.538737 78.051515) (xy 129.538736 78.051514)
(xy 129.459514 78.130737) (xy 129.403498 78.227758) (xy 129.397066 78.251763) (xy 129.382748 78.305202)
(xy 129.3745 78.335983) (xy 129.3745 78.999151) (xy 129.355593 79.057342) (xy 129.306093 79.093306)
(xy 129.244907 79.093306) (xy 129.205498 79.069156) (xy 129.196928 79.060586) (xy 129.056788 78.958768)
(xy 129.056787 78.958767) (xy 129.056785 78.958766) (xy 128.902441 78.880125) (xy 128.902438 78.880123)
(xy 128.737706 78.826598) (xy 128.737702 78.826597) (xy 128.566614 78.7995) (xy 128.566611 78.7995)
(xy 128.393389 78.7995) (xy 128.393386 78.7995) (xy 128.222297 78.826597) (xy 128.222293 78.826598)
(xy 128.057561 78.880123) (xy 128.057558 78.880125) (xy 127.903213 78.958766) (xy 127.802691 79.031801)
(xy 127.783337 79.045863) (xy 127.782691 79.046332) (xy 127.7245 79.065239) (xy 127.666309 79.046332)
(xy 127.630345 78.996832) (xy 127.6255 78.966239) (xy 127.6255 78.669255) (xy 127.644407 78.611064)
(xy 127.65449 78.599257) (xy 129.054809 77.198937) (xy 129.109324 77.171162) (xy 129.160573 77.176628)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 129.238555 77.206838) (xy 129.239802 77.207321) (xy 129.44939 77.2465) (xy 129.66261 77.2465)
(xy 129.872198 77.207321) (xy 130.071019 77.130298) (xy 130.252302 77.018052) (xy 130.409872 76.874407)
(xy 130.538366 76.704255) (xy 130.633405 76.513389) (xy 130.691756 76.30831) (xy 130.711429 76.096)
(xy 130.691756 75.88369) (xy 130.633405 75.678611) (xy 130.538366 75.487745) (xy 130.409872 75.317593)
(xy 130.282198 75.201202) (xy 130.252307 75.173952) (xy 130.2523 75.173946) (xy 130.071024 75.061705)
(xy 130.071019 75.061702) (xy 129.896808 74.994213) (xy 129.872198 74.984679) (xy 129.872197 74.984678)
(xy 129.872195 74.984678) (xy 129.66261 74.9455) (xy 129.44939 74.9455) (xy 129.239804 74.984678)
(xy 129.04098 75.061702) (xy 129.040975 75.061705) (xy 128.859699 75.173946) (xy 128.859692 75.173952)
(xy 128.702135 75.317586) (xy 128.702131 75.317589) (xy 128.702128 75.317593) (xy 128.702125 75.317597)
(xy 128.573635 75.487743) (xy 128.57363 75.487752) (xy 128.478596 75.678608) (xy 128.478595 75.678611)
(xy 128.466655 75.720574) (xy 128.420244 75.883688) (xy 128.400571 76.096) (xy 128.420244 76.308311)
(xy 128.420247 76.30832) (xy 128.47558 76.502791) (xy 128.473319 76.563933) (xy 128.450363 76.599887)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 126.938737 78.111515) (xy 126.938736 78.111514) (xy 126.859514 78.190737) (xy 126.803498 78.287758)
(xy 126.7745 78.395983) (xy 126.7745 78.951708) (xy 126.755593 79.009899) (xy 126.706093 79.045863)
(xy 126.644907 79.045863) (xy 126.617309 79.031801) (xy 126.597309 79.01727) (xy 126.516788 78.958768)
(xy 126.362445 78.880127) (xy 126.362444 78.880126) (xy 126.362441 78.880125) (xy 126.362438 78.880123)
(xy 126.197706 78.826598) (xy 126.197702 78.826597) (xy 126.026614 78.7995) (xy 126.026611 78.7995)
(xy 125.853389 78.7995) (xy 125.853386 78.7995) (xy 125.682297 78.826597) (xy 125.682293 78.826598)
(xy 125.517561 78.880123) (xy 125.517558 78.880125) (xy 125.363213 78.958767) (xy 125.282691 79.01727)
(xy 125.2245 79.036177) (xy 125.166309 79.01727) (xy 125.130345 78.967769) (xy 125.1255 78.937177)
(xy 125.1255 78.629255) (xy 125.144407 78.571064) (xy 125.15449 78.559257) (xy 126.514809 77.198937)
(xy 126.569324 77.171162) (xy 126.620573 77.176628) (xy 126.698555 77.206838) (xy 126.699802 77.207321)
(xy 126.90939 77.2465) (xy 127.12261 77.2465) (xy 127.332198 77.207321) (xy 127.531019 77.130298)
Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
(xy 127.712302 77.018052) (xy 127.869872 76.874407) (xy 127.998366 76.704255) (xy 128.093405 76.513389)
(xy 128.151756 76.30831) (xy 128.171429 76.096) (xy 128.151756 75.88369) (xy 128.093405 75.678611)
(xy 127.998366 75.487745) (xy 127.869872 75.317593) (xy 127.742198 75.201202) (xy 127.712307 75.173952)
(xy 127.7123 75.173946) (xy 127.531024 75.061705) (xy 127.531019 75.061702) (xy 127.356808 74.994213)
(xy 127.332198 74.984679) (xy 127.332197 74.984678) (xy 127.332195 74.984678) (xy 127.12261 74.9455)
(xy 126.90939 74.9455) (xy 126.699804 74.984678) (xy 126.50098 75.061702) (xy 126.500975 75.061705)
(xy 126.319699 75.173946) (xy 126.319692 75.173952) (xy 126.162135 75.317586) (xy 126.162131 75.317589)
(xy 126.162128 75.317593) (xy 126.162125 75.317597) (xy 126.033635 75.487743) (xy 126.03363 75.487752)
(xy 125.938596 75.678608) (xy 125.938595 75.678611) (xy 125.926655 75.720574) (xy 125.880244 75.883688)
PCB with DIP-28 SRAM
2024-09-06 09:21:51 +02:00
(xy 125.860571 76.096) (xy 125.880244 76.308311) (xy 125.880247 76.30832) (xy 125.93558 76.502791)
(xy 125.933319 76.563933) (xy 125.910363 76.599887) (xy 124.438737 78.071515) (xy 124.438736 78.071514)
(xy 124.359514 78.150737) (xy 124.303498 78.247758) (xy 124.2745 78.355983) (xy 124.2745 78.98077)
(xy 124.255593 79.038961) (xy 124.206093 79.074925) (xy 124.144907 79.074925) (xy 124.117309 79.060863)
(xy 124.116926 79.060585) (xy 124.076663 79.031332) (xy 123.976786 78.958766) (xy 123.822441 78.880125)
(xy 123.822438 78.880123) (xy 123.657706 78.826598) (xy 123.657702 78.826597) (xy 123.486614 78.7995)
(xy 123.486611 78.7995) (xy 123.313389 78.7995) (xy 123.313386 78.7995) (xy 123.142297 78.826597)
(xy 123.142293 78.826598) (xy 122.977561 78.880123) (xy 122.977558 78.880125) (xy 122.823213 78.958766)
(xy 122.713144 79.038737) (xy 122.683074 79.060585) (xy 122.682691 79.060863) (xy 122.6245 79.07977)
(xy 122.566309 79.060863) (xy 122.530345 79.011363) (xy 122.5255 78.98077) (xy 122.5255 78.689255)
(xy 122.544407 78.631064) (xy 122.55449 78.619257) (xy 123.974809 77.198937) (xy 124.029324 77.171162)
(xy 124.080573 77.176628) (xy 124.158555 77.206838) (xy 124.159802 77.207321) (xy 124.36939 77.2465)
(xy 124.58261 77.2465) (xy 124.792198 77.207321) (xy 124.991019 77.130298) (xy 125.172302 77.018052)
(xy 125.329872 76.874407) (xy 125.458366 76.704255) (xy 125.553405 76.513389) (xy 125.611756 76.30831)
(xy 125.631429 76.096) (xy 125.611756 75.88369) (xy 125.553405 75.678611) (xy 125.458366 75.487745)
(xy 125.329872 75.317593) (xy 125.202198 75.201202) (xy 125.172307 75.173952) (xy 125.1723 75.173946)
(xy 124.991024 75.061705) (xy 124.991019 75.061702) (xy 124.816808 74.994213) (xy 124.792198 74.984679)
(xy 124.792197 74.984678) (xy 124.792195 74.984678) (xy 124.58261 74.9455) (xy 124.36939 74.9455)
(xy 124.159804 74.984678) (xy 123.96098 75.061702) (xy 123.960975 75.061705) (xy 123.779699 75.173946)
(xy 123.779692 75.173952) (xy 123.622135 75.317586) (xy 123.622131 75.317589) (xy 123.622128 75.317593)
(xy 123.622125 75.317597) (xy 123.493635 75.487743) (xy 123.49363 75.487752) (xy 123.398596 75.678608)
(xy 123.398595 75.678611) (xy 123.386655 75.720574) (xy 123.340244 75.883688) (xy 123.320571 76.096)
(xy 123.340244 76.308311) (xy 123.340247 76.30832) (xy 123.39558 76.502791) (xy 123.393319 76.563933)
(xy 123.370363 76.599887) (xy 121.838737 78.131515) (xy 121.838736 78.131514) (xy 121.759514 78.210737)
(xy 121.703498 78.307758) (xy 121.6745 78.415983) (xy 121.6745 78.937177) (xy 121.655593 78.995368)
(xy 121.606093 79.031332) (xy 121.544907 79.031332) (xy 121.517309 79.01727) (xy 121.489178 78.996832)
(xy 121.436788 78.958768) (xy 121.282445 78.880127) (xy 121.282444 78.880126) (xy 121.282441 78.880125)
(xy 121.282438 78.880123) (xy 121.117706 78.826598) (xy 121.117702 78.826597) (xy 120.946614 78.7995)
(xy 120.946611 78.7995) (xy 120.773389 78.7995) (xy 120.773386 78.7995) (xy 120.602297 78.826597)
(xy 120.602293 78.826598) (xy 120.437561 78.880123) (xy 120.437558 78.880125) (xy 120.283214 78.958766)
(xy 120.143069 79.060588) (xy 120.113862 79.089795) (xy 120.059345 79.117571) (xy 119.998914 79.107999)
(xy 119.958124 79.069289) (xy 119.940485 79.038737) (xy 119.861263 78.959515) (xy 119.86126 78.959513)
(xy 118.661263 77.759515) (xy 118.66126 77.759513) (xy 118.56424 77.703498) (xy 118.564242 77.703498)
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Refresh schema and PCB, remove obsolete sections
2024-09-04 07:33:55 +02:00
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