Add ROM image generation

Makefile

@@ -1,19 +1,18 @@
-
-MACHINE := pet
-MEMCFG := mem.cfg
-
 .PHONY: all clean
 
-all: rs232.prg test.prg
+all: driver.prg driver.rom test.prg driver2.prg driver2.rom
 
 clean:
-	rm -f *.o *.lst *.map *.prg
+	rm -f *.o *.lst *.map *.prg *.rom
 
-rs232.prg: driver.o
-	cl65 -v -C ${MEMCFG} -m rs232.map -o $@ $^
-
-test.prg: test.bas
+%.prg: %.bas
 	petcat -w40 -o $@ -- $^
 
+%.prg: %.o
+	cl65 -v -C mem.cfg -m $@.map -o $@ $^
+
+%.rom: %.o
+	cl65 -v -C rom.cfg -m $@.map -o $@ $^
+
 %.o: %.a65
-	ca65 -v -l $(patsubst %.o,%.lst,$@) -t ${MACHINE} -o $@ $<
+	ca65 -v -l $(patsubst %.o,%.lst,$@) -t pet -o $@ $<

rom.cfg

@@ -0,0 +1,22 @@
+MEMORY {
+    # $ED-$F7 seems to be an unused area in the zero page according to the BASIC 2.0/4.0 memory map
+    ZP:       file = "", define = yes, start = $00ED, size = $000A;
+    # the load address is not used if we generate a raw ROM image
+    LOADADDR: file = "",               start = $6FFE, size = $0002;
+    # we're loading at $7000, max code size $800 bytes
+    RAM:      file = "",               start = $7000, size = $0800;
+    # if we reside in ROM instead, we should have more space available
+    ROM:      file = %O,               start = $9000, size = $2000;
+    # usable memory from the "tape #1 input buffer"
+    SCRATCH:  file = "",               start = $027A, size = 191;
+}
+SEGMENTS {
+    ZEROPAGE: load = ZP,       type = zp;
+    LOADADDR: load = LOADADDR, type = ro;
+    # change these two to "ROM" if you want to put them on a ROM chip
+    CODE:     load = ROM,      type = ro;
+    RODATA:   load = ROM,      type = ro;
+    # data and bss should come after the code if they all reside in RAM
+    DATA:     load = RAM,      type = rw;
+    BSS:      load = SCRATCH,  type = bss, define   = yes;
+}