Implement RX
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14cff310b7
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523c4c6dea
1 changed files with 62 additions and 8 deletions
70
driver.a65
70
driver.a65
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@ -385,7 +385,7 @@ BAUD_RATE = 300
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@handleflip:
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; read PIA1 CRA, interrupt flag is automatically cleared
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lda PIA1_CRA
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; save for later, so we don't need to fetch it again
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; save CRA for later, so we don't need to fetch it again
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tax
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; bit 7 is the CA1 interrupt flag - fired?
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and #%10000000
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@ -404,6 +404,14 @@ BAUD_RATE = 300
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and #%01111111
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sta PIA1_CRA
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; check if we're already in the middle of a reception
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lda inshift
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; yes, don't do anything
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bne @handletimer
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; nope, initiate reception
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lda #10
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sta inshift
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@handletimer:
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; VIA timer 2 fired?
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lda VIA_IFR
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@ -460,14 +468,14 @@ BAUD_RATE = 300
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; load shift register bit 0
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lda outbuf
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and #%00000001
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; set or clear?
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beq @shiftoutclear
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; set output
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; mark or blank?
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beq @shiftoutblank
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; set output high
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lda #%00001000
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ora VIA_PB
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bvc @shiftoutstore
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@shiftoutclear:
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; clear output
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@shiftoutblank:
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; set output low
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lda #%11110111
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and VIA_PB
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@shiftoutstore:
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@ -483,9 +491,55 @@ BAUD_RATE = 300
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dec outshift
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@shiftin:
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; TODO process input bit-bang
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; FIXME we should check the start and stop bits, to synchronize RS232 transmissions
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; check first if a reception is in progress
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lda inshift
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; nope, skip input processing
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beq @irqreturn
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; for unconditional branch
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clv
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; pick up the current CA1 state
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lda ca1state
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and #%00000100
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; mark or blank?
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beq @shiftinblank
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; shift in high bit
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sec
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bvc @shiftinstore
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@shiftinblank:
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; shift in low bit
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clc
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@shiftinstore:
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; rotate carry bit into buffer
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rol inbuf
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rol inbuf+1
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; decrement counter
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dec inshift
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@storein:
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; TODO process input fifo
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; did we complete a transmission?
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bne @irqreturn
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; check if we have space available in the buffer
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lda inqlen
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cmp #16
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; nope, drop this byte
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bcc @irqreturn
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; yes, store it
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tax
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lda inbuf+1
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lsr
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lda inbuf
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ror
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sta inq, x
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; and update the buffer length
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dex
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stx inqlen
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@irqreturn:
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; restore registers
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