Implement RX

This commit is contained in:
Gregor Riepl 2022-08-20 11:11:19 +02:00
parent 14cff310b7
commit 523c4c6dea

View file

@ -385,7 +385,7 @@ BAUD_RATE = 300
@handleflip:
; read PIA1 CRA, interrupt flag is automatically cleared
lda PIA1_CRA
; save for later, so we don't need to fetch it again
; save CRA for later, so we don't need to fetch it again
tax
; bit 7 is the CA1 interrupt flag - fired?
and #%10000000
@ -404,6 +404,14 @@ BAUD_RATE = 300
and #%01111111
sta PIA1_CRA
; check if we're already in the middle of a reception
lda inshift
; yes, don't do anything
bne @handletimer
; nope, initiate reception
lda #10
sta inshift
@handletimer:
; VIA timer 2 fired?
lda VIA_IFR
@ -460,14 +468,14 @@ BAUD_RATE = 300
; load shift register bit 0
lda outbuf
and #%00000001
; set or clear?
beq @shiftoutclear
; set output
; mark or blank?
beq @shiftoutblank
; set output high
lda #%00001000
ora VIA_PB
bvc @shiftoutstore
@shiftoutclear:
; clear output
@shiftoutblank:
; set output low
lda #%11110111
and VIA_PB
@shiftoutstore:
@ -483,9 +491,55 @@ BAUD_RATE = 300
dec outshift
@shiftin:
; TODO process input bit-bang
; FIXME we should check the start and stop bits, to synchronize RS232 transmissions
; check first if a reception is in progress
lda inshift
; nope, skip input processing
beq @irqreturn
; for unconditional branch
clv
; pick up the current CA1 state
lda ca1state
and #%00000100
; mark or blank?
beq @shiftinblank
; shift in high bit
sec
bvc @shiftinstore
@shiftinblank:
; shift in low bit
clc
@shiftinstore:
; rotate carry bit into buffer
rol inbuf
rol inbuf+1
; decrement counter
dec inshift
@storein:
; TODO process input fifo
; did we complete a transmission?
bne @irqreturn
; check if we have space available in the buffer
lda inqlen
cmp #16
; nope, drop this byte
bcc @irqreturn
; yes, store it
tax
lda inbuf+1
lsr
lda inbuf
ror
sta inq, x
; and update the buffer length
dex
stx inqlen
@irqreturn:
; restore registers