Generate a PRG file

.gitignore

@@ -7,3 +7,4 @@ plot/
 *.bin
 *.map
 *.lst
+*.prg

Makefile

@@ -4,17 +4,13 @@ MEMCFG := mem.cfg
 
 .PHONY: all clean
 
-all: rs232.bin rs232.lst
+all: rs232.prg
 
 clean:
 	rm -f rs232.bin *.o *.lst *.map
 
-rs232.bin: driver.o
+rs232.prg: driver.o
 	cl65 -v -C ${MEMCFG} -m rs232.map -o $@ $^
 
-%.lst: %.bin
-	@# the start address shouldn't be hardcoded here...
-	da65 -o $@ -S 0x7000 $<
-
 %.o: %.a65
 	ca65 -v -l $(patsubst %.o,%.lst,$@) -t ${MACHINE} -o $@ $<

driver.a65

@@ -40,6 +40,13 @@ BAUD_RATE = 300
 	rs_status: .byte 0
 	; TODO add a state variable that can be monitored by the BASIC WAIT command
 
+; this is load address, for generating PRG files
+; works, as long as the code segment comes right after these two bytes
+.segment "LOADADDR"
+	.export LOADADDR
+	LOADADDR:
+	.word *+2
+
 ; entry points
 .code
 	; these are convenience entry points right at the beginning of the page,

mem.cfg

@@ -1,6 +1,8 @@
 MEMORY {
     # $ED-$F7 seems to be an unused area in the zero page according to the BASIC 2.0/4.0 memory map
     ZP:       file = "", define = yes, start = $00ED, size = $000A;
+    # let's create a PRG file - note that you must define this segment in your code
+    LOADADDR: file = %O,               start = $6FFE, size = $0002;
     # we're loading at $7000, max code size $800 bytes
     RAM:      file = %O,               start = $7000, size = $0800;
     # if we reside in ROM instead, we should have more space available
@@ -10,6 +12,7 @@ MEMORY {
 }
 SEGMENTS {
     ZEROPAGE: load = ZP,       type = zp;
+    LOADADDR: load = LOADADDR, type = ro;
     # change these two to "ROM" if you want to put them on a ROM chip
     CODE:     load = RAM,      type = ro;
     RODATA:   load = RAM,      type = ro;