display: added optional electrolytic caps

This commit is contained in:
Gregor Riepl 2022-01-10 01:56:14 +01:00
parent 20cf35bbd1
commit f8b0ea29ba
3 changed files with 955 additions and 761 deletions

View file

@ -121,6 +121,26 @@ X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_CP
#
DEF Device_CP C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_CP" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
CP_*
$ENDFPLIST
DRAW
S -90 20 90 40 0 1 0 N
S 90 -20 -90 -40 0 1 0 F
P 2 0 1 0 -70 90 -30 90 N
P 2 0 1 0 -50 110 -50 70 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_Crystal
#
DEF Device_Crystal Y 0 40 N N 1 F N

File diff suppressed because it is too large Load diff

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@ -1024,4 +1024,40 @@ $EndComp
Wire Wire Line
10300 4350 10200 4350
Connection ~ 10200 4350
$Comp
L Device:CP C12
U 1 1 61D77619
P 800 2550
F 0 "C12" H 918 2596 50 0000 L CNN
F 1 "10u" H 918 2505 50 0000 L CNN
F 2 "Capacitor_SMD:CP_Elec_5x5.3" H 838 2400 50 0001 C CNN
F 3 "~" H 800 2550 50 0001 C CNN
1 800 2550
1 0 0 -1
$EndComp
$Comp
L Device:CP C13
U 1 1 61D77884
P 4500 2650
F 0 "C13" H 4618 2696 50 0000 L CNN
F 1 "22u" H 4618 2605 50 0000 L CNN
F 2 "Capacitor_SMD:CP_Elec_5x5.3" H 4538 2500 50 0001 C CNN
F 3 "~" H 4500 2650 50 0001 C CNN
1 4500 2650
1 0 0 -1
$EndComp
Wire Wire Line
4100 2500 4500 2500
Wire Wire Line
4100 3100 4500 3100
Wire Wire Line
4500 3100 4500 2800
Connection ~ 4100 3100
Wire Wire Line
1200 2400 800 2400
Wire Wire Line
1200 3100 800 3100
Wire Wire Line
800 3100 800 2700
Connection ~ 1200 3100
$EndSCHEMATC