display: added optional electrolytic caps
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20cf35bbd1
commit
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3 changed files with 955 additions and 761 deletions
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@ -121,6 +121,26 @@ X ~ 2 0 -150 110 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_CP
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#
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DEF Device_CP C 0 10 N Y 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "Device_CP" 25 -100 50 H V L CNN
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F2 "" 38 -150 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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CP_*
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$ENDFPLIST
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DRAW
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S -90 20 90 40 0 1 0 N
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S 90 -20 -90 -40 0 1 0 F
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P 2 0 1 0 -70 90 -30 90 N
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P 2 0 1 0 -50 110 -50 70 N
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X ~ 1 0 150 110 D 50 50 1 1 P
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X ~ 2 0 -150 110 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_Crystal
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#
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DEF Device_Crystal Y 0 40 N N 1 F N
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File diff suppressed because it is too large
Load diff
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@ -1024,4 +1024,40 @@ $EndComp
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Wire Wire Line
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10300 4350 10200 4350
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Connection ~ 10200 4350
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$Comp
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L Device:CP C12
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U 1 1 61D77619
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P 800 2550
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F 0 "C12" H 918 2596 50 0000 L CNN
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F 1 "10u" H 918 2505 50 0000 L CNN
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F 2 "Capacitor_SMD:CP_Elec_5x5.3" H 838 2400 50 0001 C CNN
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F 3 "~" H 800 2550 50 0001 C CNN
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1 800 2550
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1 0 0 -1
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$EndComp
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$Comp
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L Device:CP C13
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U 1 1 61D77884
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P 4500 2650
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F 0 "C13" H 4618 2696 50 0000 L CNN
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F 1 "22u" H 4618 2605 50 0000 L CNN
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F 2 "Capacitor_SMD:CP_Elec_5x5.3" H 4538 2500 50 0001 C CNN
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F 3 "~" H 4500 2650 50 0001 C CNN
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1 4500 2650
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1 0 0 -1
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$EndComp
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Wire Wire Line
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4100 2500 4500 2500
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Wire Wire Line
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4100 3100 4500 3100
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Wire Wire Line
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4500 3100 4500 2800
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Connection ~ 4100 3100
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Wire Wire Line
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1200 2400 800 2400
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Wire Wire Line
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1200 3100 800 3100
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Wire Wire Line
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800 3100 800 2700
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Connection ~ 1200 3100
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$EndSCHEMATC
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