Gregor Riepl
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ba9b426ea7
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Removed separate data sheet references
Added text file with data sheet URLs
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2015-04-06 14:36:41 +02:00 |
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Gregor Riepl
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046e9fb646
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Added copyright field and OSHW logo to PCB
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2015-04-06 14:32:44 +02:00 |
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Gregor Riepl
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b1bdad86b1
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Added -bak wildcard to gitignore
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2015-04-06 14:32:27 +02:00 |
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Gregor Riepl
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33578913c5
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Removed previous PCB layout
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2015-04-06 14:16:18 +02:00 |
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Gregor Riepl
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64471d0c2e
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Converted board to new KiCAD format
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2015-04-06 14:15:33 +02:00 |
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Gregor Riepl
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c66fe0a665
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Updated PCB
Placed part labels
Moved some parts to use space more efficiently
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2015-04-06 14:13:22 +02:00 |
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Gregor Riepl
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3a813538f1
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Updated gitignore
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2015-04-06 13:27:27 +02:00 |
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Gregor Riepl
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7f742b2021
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Added module library
Fixed up schema with new part names
Partial PCB redesign, incorporated schematic changes and errata
Made PCB slightly smaller
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2015-04-05 13:57:04 +02:00 |
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Gregor Riepl
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2927c833ac
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Updated schematic revision and copyright
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2015-04-03 18:15:04 +02:00 |
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Gregor Riepl
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78d82c87f2
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Fixed banknote scanner connector erratum, short circuit on power lines
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2015-04-03 18:12:38 +02:00 |
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Gregor Riepl
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3928ebaa2f
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Added component library
Updated conmponents in schematic
Changed resistors and capacitors to standard symbol
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2015-04-03 18:09:41 +02:00 |
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Gregor Riepl
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cc1b0d047e
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Added ATmega128A data sheet
Removed ATmega644P data sheet
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2015-04-03 17:25:49 +02:00 |
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Gregor Riepl
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22a74a50ad
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Updated large DB9 socket PCB with errata from schema
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2015-04-03 17:04:03 +02:00 |
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Gregor Riepl
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95062eae05
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Added global KiCad project
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2015-04-03 00:20:38 +02:00 |
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Gregor Riepl
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d4c9c1d18b
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Added netlists to gitignore
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2015-04-02 18:20:28 +02:00 |
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Gregor Riepl
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6db273f22e
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Fixed a number of errata in first control board revision
Swapped USB B port D+ and D- lines
Swapped UART0 RX and TX lines
Changed resistor values
Added UART0 RX and TX LEDs
Conntected USB sleep control line
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2015-04-02 18:17:12 +02:00 |
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Gregor Riepl
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7781096ae9
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Unified silk screen text sizes, fixed and relocated some text
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2015-04-02 18:00:14 +02:00 |
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Gregor Riepl
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3a3f3f5903
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Added board layout for smaller DB9 sockets
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2015-04-02 17:56:51 +02:00 |
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Gregor Riepl
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d71b00987a
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Added redesigned control board schema and PCB layout
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2015-04-02 17:54:58 +02:00 |
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Gregor Riepl
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5b853b0afe
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Added KiCad library cache with missing parts
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2015-04-01 19:31:37 +02:00 |
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Gregor Riepl
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7c575ed3a7
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Added datasheet URL for BT136 Triac (NXP)
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2015-04-01 19:28:36 +02:00 |
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Gregor Riepl
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4486863bac
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Added zero crossing detector circuit simulation graph
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2015-04-01 18:12:08 +02:00 |
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Gregor Riepl
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e73818636d
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Added datasheet URL for ATmega644P MCU
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2015-04-01 18:09:51 +02:00 |
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Gregor Riepl
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8b5b5d5288
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Updated schema with more complete circuit
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2015-04-01 18:04:20 +02:00 |
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Gregor Riepl
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c8b8e5105b
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First prototype all-in-one schema
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2015-04-01 18:03:04 +02:00 |
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