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s3lph 2022-02-07 09:48:40 +01:00
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@ -26,9 +26,9 @@ patterns.
* Install the [xa65][xa65] toolchain. * Install the [xa65][xa65] toolchain.
* Clone this repository. * Clone this repository.
* Run `make`. This will produce (among other) the following files: * Run `make`. This will produce (among other) the following files:
* `memtest-f000.901465.bin`: The binary you'll later flash to an ((E)E)PROM. * `memtest*k-f000.901465.bin`: 4K, 8K, 16K and 32K variants of the binary you'll later flash to an ((E)E)PROM.
* `memtest-f000.901465+ascii.bin`: The same code, but text is rendered as ASCII instead of PETSCII. Used by the emulator. * `out/memtest4k-f000-ascii.emu6502.bin`: The same code, but text is rendered as ASCII instead of PETSCII. Used by the emulator.
* `emu6502`: A MOS 6502 emulator for testing. * `out/emu6502`: A MOS 6502 emulator for testing.
## Testing in the Emulator ## Testing in the Emulator
@ -36,7 +36,7 @@ The emulator uses [Fake6502][fake6502] to emulate the MOS 6502 CPU.
The following memory regions are mapped into the emulator's address The following memory regions are mapped into the emulator's address
space, compatible with the PET 2001 / CBM 3001 memory map: space, compatible with the PET 2001 / CBM 3001 memory map:
* `$0000:$0fff`: RAM with simulated failures (reduced size for faster testing) * `$0000:$0fff`: RAM with simulated failures (4K only for faster testing)
* `$8000:$8fff`: Video buffer, printed to stdout after each instruction * `$8000:$8fff`: Video buffer, printed to stdout after each instruction
* `$f000:$ffff`: The `memtest-f000.901465+ascii.bin` ROM * `$f000:$ffff`: The `memtest-f000.901465+ascii.bin` ROM
@ -44,9 +44,10 @@ Run `./emu6502`.
## Run on a Real PET / CBM ## Run on a Real PET / CBM
* Flash the `memtest-f000.901465.bin` binary to a ((E)E)PROM compatible to the MOS 901465 ROM chip. * Figure out how much memory your device has. Choose the appropriate image (`memtest4k`, `memtest8k`, `memtest16k` or `memtest32k`).
* Flash the `memtest*k-f000.901465.bin` image to a ((E)E)PROM compatible to the MOS 901465 ROM chip.
* Most parallel ROMs of at least 4KiB should be usable, just short the excess uppermost address pins to GND and ensure pin compatibility, e.g. through an adapter PCB. * Most parallel ROMs of at least 4KiB should be usable, just short the excess uppermost address pins to GND and ensure pin compatibility, e.g. through an adapter PCB.
* Remove the KERNAL ROM from your PET / CBM. * Remove the KERNAL ROM (the one mapped to `$f000:$ffff`) from your PET / CBM.
* Place the memtest ROM into the same socket. * Place the memtest ROM into the same socket.
* Power up the computer. It should immediately start testing the memory. * Power up the computer. It should immediately start testing the memory.
@ -63,6 +64,7 @@ After starting up, most of the screen will be empty.
* When all memtest passes have completed, there will be an additional `=` character left of these chars. * When all memtest passes have completed, there will be an additional `=` character left of these chars.
* When the memtest routine was interrupted by an NMI, there will be a `!` instead. * When the memtest routine was interrupted by an NMI, there will be a `!` instead.
* When the screen is not cleared (filled with random characters), and the first line starts with `ZF***ZF` (`*` being other seemingly random characters), a fault in the first few bytes of the zero page were detected. Since the memtest uses this area to store its state, the test is terminated prematurely. * When the screen is not cleared (filled with random characters), and the first line starts with `ZF***ZF` (`*` being other seemingly random characters), a fault in the first few bytes of the zero page were detected. Since the memtest uses this area to store its state, the test is terminated prematurely.
* The tree characters in between the two `ZF`s are, from left to right, the zeropage address byte, the value written, the value read back.
``` ```
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