s3lph/cbm3001-memtest
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Fix output filenames in README

Browse source
This commit is contained in:
s3lph 2022-02-08 12:23:52 +01:00
parent c1b708c332
commit add9a328a2
1 changed files with 4 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
README.md
View file

@ -27,10 +27,10 @@ patterns.
* Install the [xa65][xa65] toolchain.
* Clone this repository.
* Run `make`. This will produce (among other) the following files:
* Run `make`. This will produce (among other) the following files in the `out/` directory:
* `memtest*k-f000.901465.bin`: 4K, 8K, 16K and 32K variants of the binary you'll later flash to an ((E)E)PROM.
* `out/memtest4k-f000-ascii.emu6502.bin`: The same code, but text is rendered as ASCII instead of PETSCII. Used by the emulator.
* `out/emu6502`: A MOS 6502 emulator for testing.
* `memtest4k-f000-ascii.emu6502.bin`: The same code, but text is rendered as ASCII instead of PETSCII. Used by the emulator.
* `emu6502`: A MOS 6502 emulator for testing.
## Testing in the Emulator
@ -47,7 +47,7 @@ Run `out/emu6502`.
## Run on a Real PET / CBM
* Figure out how much memory your device has. Choose the appropriate image (`memtest4k`, `memtest8k`, `memtest16k` or `memtest32k`).
* Flash the `memtest*k-f000.901465.bin` image to a ((E)E)PROM compatible to the MOS 901465 ROM chip.
* Flash the `out/memtest*k-f000.901465.bin` image to a ((E)E)PROM compatible to the MOS 901465 ROM chip.
* Most parallel ROMs of at least 4KiB should be usable, just short the excess uppermost address pins to GND and ensure pin compatibility, e.g. through an adapter PCB.
* Remove the KERNAL ROM (the one mapped to `$f000:$ffff`) from your PET / CBM.
* Place the memtest ROM into the same socket.