Gregor Riepl
|
9229cef954
|
Drop excluded parts from BOM
|
2024-09-04 07:46:42 +02:00 |
|
Gregor Riepl
|
d3379170c1
|
Refresh schema and PCB, remove obsolete sections
|
2024-09-04 07:33:55 +02:00 |
|
Gregor Riepl
|
e6ca30ddba
|
Routed 62c2256 RAM, added speaker
|
2024-03-13 08:19:07 +01:00 |
|
Gregor Riepl
|
ae654de79a
|
wip v4 variant
|
2024-03-10 14:44:15 +01:00 |
|
Gregor Riepl
|
5ab7d36e3a
|
Group blocks in schematic
|
2024-03-10 13:30:34 +01:00 |
|
Gregor Riepl
|
b814979dab
|
CE should depend on phi2
|
2024-03-06 23:56:51 +01:00 |
|
Gregor Riepl
|
1a9320a034
|
Add test points, reorder reset header
|
2024-03-02 23:58:15 +01:00 |
|
Gregor Riepl
|
aab0e2b974
|
Added pulse generator to WR pin
|
2024-02-08 01:32:12 +01:00 |
|
Gregor Riepl
|
01487a4c75
|
Correct pinout for PET mem interface
|
2023-11-12 21:51:37 +01:00 |
|
Gregor Riepl
|
286b80476c
|
Enlarged vias for cnc production
|
2023-10-17 23:43:20 +02:00 |
|
Gregor Riepl
|
741f704ef9
|
Initial checkin
|
2023-10-13 09:27:04 +02:00 |
|