Update patch, add basic test prg, rewrite TX test code
This commit is contained in:
Gregor Riepl
parent
42b1c29509
commit
3a59b292a4
4 changed files with 163 additions and 38 deletions
7
Makefile
7
Makefile
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@ -4,13 +4,16 @@ MEMCFG := mem.cfg
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.PHONY: all clean
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all: rs232.prg
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all: rs232.prg test.prg
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clean:
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rm -f rs232.bin *.o *.lst *.map
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rm -f *.o *.lst *.map *.prg
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rs232.prg: driver.o
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cl65 -v -C ${MEMCFG} -m rs232.map -o $@ $^
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test.prg: test.bas
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petcat -w40 -o $@ -- $^
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%.o: %.a65
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ca65 -v -l $(patsubst %.o,%.lst,$@) -t ${MACHINE} -o $@ $<
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143
driver.a65
143
driver.a65
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@ -20,7 +20,7 @@ PIA2_CRB := PIA2+$3
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; 1MHz phase2 clock
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PHI2_CLOCK = 1000000
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; don't set the baud rate too high, or other operations will be starved
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BAUD_RATE = 300
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BAUD_RATE = 600
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; parameters and return values can reside in an unused area of the zero page
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.zeropage
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@ -40,8 +40,9 @@ BAUD_RATE = 300
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rs_status: .byte 0
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; TODO add a state variable that can be monitored by the BASIC WAIT command
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; this is load address, for generating PRG files
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; works, as long as the code segment comes right after these two bytes
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; this is for the load address, so we can generate PRG files.
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; works as long as the code segment comes right after these two bytes,
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; i.e. as long as the LOADADDR segment resides at $load_address - 2
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.segment "LOADADDR"
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.export LOADADDR
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LOADADDR:
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@ -49,6 +50,10 @@ BAUD_RATE = 300
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; entry points
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.code
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; for development and testing
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.export rs_test
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rs_test:
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jmp test
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; these are convenience entry points right at the beginning of the page,
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; to reduce dependency on code size.
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; relocatable code would be perfect, but that's a lot more work.
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@ -94,8 +99,108 @@ BAUD_RATE = 300
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; main code follows
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.code
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;FIXME BEGIN
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; test code:
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; single-byte RS-232 transmission
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; this code runs asynchronously in a VIA T2 interrupt handler
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; the handler is installed and uninstalled automatically until
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; transmission is complete.
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; do not call this too quickly in succession, or you will lock
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; up the CPU in an endless loop.
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test:
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sei
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lda #10
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sta rs_available
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lda rs_data
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asl a
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sta rs_data
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lda #%00000001
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rol a
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sta rs_data+1
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lda VIA_DDRB
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ora #%00001000
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sta VIA_DDRB
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lda IRQVec
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ldx IRQVec+1
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sta oldvector
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stx oldvector+1
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lda #<irqtest
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ldx #>irqtest
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sta IRQVec
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stx IRQVec+1
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lda VIA_CR
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and #%11011111
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sta VIA_CR
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lda #%10100000
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sta VIA_IER
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testperiod = PHI2_CLOCK/BAUD_RATE
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lda #<testperiod
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ldx #>testperiod
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sta VIA_T2CL
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stx VIA_T2CH
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rts
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cli
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rts
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irqtest:
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sei
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cld
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pha
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txa
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pha
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lda VIA_IFR
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and #%00100000
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beq @irqtestend
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ldx rs_available
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beq @irqtestrestore
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dex
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stx rs_available
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;lda #<testperiod
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ldx #>testperiod
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;sta VIA_T2CL
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stx VIA_T2CH
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lsr rs_data+1
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ror rs_data
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lda VIA_PB
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bcc @irqtestblank
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ora #%00001000
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bcs @irqtestwrite
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@irqtestblank:
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and #%11110111
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@irqtestwrite:
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sta VIA_PB
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@irqtestend:
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pla
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tax
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pla
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jmp (oldvector)
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@irqtestrestore:
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lda #%00100000
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sta VIA_IER
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lda oldvector
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ldx oldvector+1
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sta IRQVec
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stx IRQVec+1
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clv
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bvc @irqtestend
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;FIXME END
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; driver installation, must be called once to set up IRQs, etc.
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install:
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; FIXME this doesn't work if we're loading from ROM
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lda #1
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sta initialized
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; check if we're already initialized
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lda initialized
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beq @hwinit
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@ -107,7 +212,7 @@ BAUD_RATE = 300
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@hwinit:
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; disable interrupts, so we're not disturbed
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cli
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sei
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; save the previous handler
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lda IRQVec
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@ -115,9 +220,9 @@ BAUD_RATE = 300
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lda IRQVec+1
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sta oldvector+1
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; assign our custom interrupt handler to the IRQ vector
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lda #>irqhandler
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sta IRQVec
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lda #<irqhandler
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sta IRQVec
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lda #>irqhandler
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sta IRQVec+1
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; VIA timer 2 cannot be enabled and disabled on the fly, so we'll
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@ -163,7 +268,7 @@ BAUD_RATE = 300
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lda #rs_status_ok
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sta rs_status
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; fire away
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sei
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cli
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; return
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rts
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@ -181,7 +286,7 @@ BAUD_RATE = 300
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@hwuninit:
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; disable interrupts, so we're not disturbed
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cli
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sei
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; restore the previous handler
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lda oldvector
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@ -210,7 +315,7 @@ BAUD_RATE = 300
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lda #rs_status_ok
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sta rs_status
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; the rest of the system will probably want interrupts enabled
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sei
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cli
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; return
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rts
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@ -230,7 +335,7 @@ BAUD_RATE = 300
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@dowrite:
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; disable interrupts while we write into the buffer
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cli
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sei
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; test if there's space in the buffer first
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lda #16
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@ -275,7 +380,7 @@ BAUD_RATE = 300
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@wrdone:
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; and re-enable
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sei
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cli
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; return
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rts
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@ -295,7 +400,7 @@ BAUD_RATE = 300
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@doread:
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; disable interrupts while we read the buffer
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cli
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sei
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; test if we have any data first
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lda inqlen
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@ -339,7 +444,7 @@ BAUD_RATE = 300
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@rddone:
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; and re-enable
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sei
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cli
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; return
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rts
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@ -348,9 +453,9 @@ BAUD_RATE = 300
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starttimer:
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; arm VIA timer 2 by latching the counter
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period = PHI2_CLOCK/BAUD_RATE
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lda #>period
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sta VIA_T1CL
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lda #<period
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sta VIA_T1CL
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lda #>period
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sta VIA_T1CH
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; return
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rts
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@ -368,7 +473,7 @@ BAUD_RATE = 300
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.interruptor irqhandler
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irqhandler:
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; disable interrupts
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cli
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sei
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; clear decimal flag to avoid unexpected behavior
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cld
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; save registers
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@ -546,9 +651,9 @@ BAUD_RATE = 300
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pla
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tax
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pla
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; enable interrupts
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; FIXME should we do this here? what's common practice? is this compatible with other interrupt handlers
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sei
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; we don't need to re-enable interrupts here,
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; this will happen automatically when flags are restored later
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;cli
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; jump to previous handler
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; we don't need to return or restore flags, this will be done by the chained interrupt handler
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jmp (oldvector)
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15
test.bas
Normal file
15
test.bas
Normal file
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@ -0,0 +1,15 @@
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10 print "initializing driver"
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20 poke 238, asc("h")
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30 sys 28672
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120 end
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200 print "sending data"
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210 poke 238, asc("a")
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220 sys 28681
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230 s = peek(239)
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240 if s = 0 then goto 40
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250 print "status "; s
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260 goto 40
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300 print
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310 print "disabling driver"
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320 sys 28675
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430 end
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@ -12,10 +12,10 @@ index cd38b6d..cf10121 100644
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+ tape-rs232.h
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diff --git a/src/tapeport/tape-rs232.c b/src/tapeport/tape-rs232.c
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new file mode 100644
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index 0000000..2b66748
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index 0000000..680a1c4
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--- /dev/null
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+++ b/src/tapeport/tape-rs232.c
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@@ -0,0 +1,268 @@
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@@ -0,0 +1,270 @@
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+/*
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+ * tape-rs232.h: RS-232 interface for the PET, connected to the tape port
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+ *
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@ -130,7 +130,7 @@ index 0000000..2b66748
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+ dev->read_shift = 0;
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+ dev->write_shift = 0;
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+ /* TODO make the baud rate customizable */
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+ dev->baudrate = 300;
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+ dev->baudrate = 600;
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+ if (dev->write_alarm != NULL) {
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+ alarm_destroy(dev->write_alarm);
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+ }
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@ -186,7 +186,7 @@ index 0000000..2b66748
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+ alarm_unset(dev->read_alarm);
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+ }
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+}
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+
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+CLOCK last_maincpu_clk = 0;
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+static void tape_rs232_write(int port, int write_bit)
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+{
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+ if (port < 0 || port >= TAPEPORT_MAX_PORTS) {
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@ -201,7 +201,9 @@ index 0000000..2b66748
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+ /* FIXME RS-232 bit-clocking must be done on a time base, not on level change interrupts */
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+ /* write_bit is actually the contents of VIA_PB, and the write bit is PB3, i.e. 0x08 */
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+ dev->write_level = (write_bit & 0x08) != 0 ? 1 : 0;
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+ log_debug("tape_rs232: write port %d level %d", port, dev->write_level);
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+ long delta = (long) maincpu_clk - last_maincpu_clk;
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+ last_maincpu_clk = maincpu_clk;
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+ log_debug("tape_rs232: write port %d level %d clock %lu delta %ld", port, dev->write_level, maincpu_clk, delta);
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+ /* write in progress? */
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+ if (dev->write_shift == 0) {
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+ /* no, start a new transmission - but only if this was a high->low transition (start bit) */
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@ -212,7 +214,7 @@ index 0000000..2b66748
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+ /* arm the first baud rate timer: sample in the middle of each bit,
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+ * so the delay must be half a baud clock cycle */
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+ clock_t delay = machine_get_cycles_per_second() / (dev->baudrate * 2);
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+ log_debug("tape_rs232: schedule start bit alarm after %d clock cycles", delay);
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+ //log_debug("tape_rs232: schedule start bit alarm after %ld clock cycles", delay);
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+ alarm_set(dev->write_alarm, (CLOCK) (maincpu_clk + delay));
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+ }
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+ }
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@ -224,24 +226,24 @@ index 0000000..2b66748
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+ return;
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+ }
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+ tape_rs232_state_t *dev = (tape_rs232_state_t *) data;
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+ /* is this the first bit of a transmission? */
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+ if (dev->write_shift == 10) {
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+ /* yes, reconfigure the timer to run at baudrate intervals */
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+ /* prepare the next alarm, at baudrate interval */
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+ alarm_unset(dev->write_alarm);
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+ clock_t delay = machine_get_cycles_per_second() / dev->baudrate;
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+ log_debug("tape_rs232: schedule regular bit alarm after %d clock cycles", delay);
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+ //log_debug("tape_rs232: schedule regular bit alarm after %ld clock cycles", delay);
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+ alarm_set(dev->write_alarm, (CLOCK) (maincpu_clk + delay));
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+ }
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+ /* shift in the next bit */
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+ dev->write_register = (dev->write_register << 1) | dev->write_level;
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+ /* shift in the next bit, from the head */
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+ dev->write_register = (dev->write_register >> 1) | (dev->write_level ? 0x200 : 0x000);
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+ /* and decrement the counter */
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+ --dev->write_shift;
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+ long delta = (long) maincpu_clk - last_maincpu_clk;
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+ last_maincpu_clk = maincpu_clk;
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+ log_debug("tape_rs232: sample %d reg 0x%04x offset %lu clock %lu delta %ld shift %u", dev->write_level, dev->write_register, offset, maincpu_clk, delta, dev->write_shift);
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+ /* transmission complete? */
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+ if (dev->write_shift == 0) {
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+ /* yes, unarm the timer */
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+ alarm_unset(dev->write_alarm);
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+ /* check if start and stop bits are valid */
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+ if ((dev->write_register & 0x0200) == 0x0000 && (dev->write_register & 0x0001) == 0x0001) {
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+ if ((dev->write_register & 0x0200) == 0x0200 && (dev->write_register & 0x0001) == 0x0000) {
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+ /* yes, output data byte */
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+ uint8_t wbyte = (uint8_t) (dev->write_register >> 1);
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+ /* utf-8 codes generated by the petcii conversion routine can be max. 4 bytes (plus terminator) */
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