Commit graph

8 commits

Author SHA1 Message Date
Gregor Riepl 6026456fab Moved circuit diagrams into separate directories
Updated module library paths
2015-09-08 18:00:38 +02:00
Gregor Riepl c66fe0a665 Updated PCB
Placed part labels
Moved some parts to use space more efficiently
2015-04-06 14:13:22 +02:00
Gregor Riepl 7f742b2021 Added module library
Fixed up schema with new part names
Partial PCB redesign, incorporated schematic changes and errata
Made PCB slightly smaller
2015-04-05 13:57:04 +02:00
Gregor Riepl 2927c833ac Updated schematic revision and copyright 2015-04-03 18:15:04 +02:00
Gregor Riepl 78d82c87f2 Fixed banknote scanner connector erratum, short circuit on power lines 2015-04-03 18:12:38 +02:00
Gregor Riepl 3928ebaa2f Added component library
Updated conmponents in schematic
Changed resistors and capacitors to standard symbol
2015-04-03 18:09:41 +02:00
Gregor Riepl 6db273f22e Fixed a number of errata in first control board revision
Swapped USB B port D+ and D- lines
Swapped UART0 RX and TX lines
Changed resistor values
Added UART0 RX and TX LEDs
Conntected USB sleep control line
2015-04-02 18:17:12 +02:00
Gregor Riepl d71b00987a Added redesigned control board schema and PCB layout 2015-04-02 17:54:58 +02:00