Commit graph

9 commits

Author SHA1 Message Date
Gregor Riepl
4a6e099f5f Added base driver code without bit transfer 2022-08-13 20:45:08 +02:00
Gregor Riepl
3f3403eaa3 Ignore built files 2022-08-13 20:44:41 +02:00
Gregor Riepl
55962c187b Describe RS232 signal 2022-08-13 20:43:52 +02:00
Gregor Riepl
14a7a09438 Added mounting holes 2022-08-13 20:43:40 +02:00
Gregor Riepl
c2c2e50f79 Reorganize routing 2022-07-25 23:59:44 +02:00
Gregor Riepl
88a009d44e Route everything through the inverters for buffering 2022-07-24 22:57:11 +02:00
Gregor Riepl
f5142090f9 Added cassette #2 pins 2022-07-24 22:56:44 +02:00
Gregor Riepl
5e7c5b1bc9 Added link to programming info 2022-07-21 22:42:22 +02:00
Gregor Riepl
445f343a45 Added circuit with inverters 2022-07-21 22:36:35 +02:00