Gregor Riepl
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3a59b292a4
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Update patch, add basic test prg, rewrite TX test code
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2022-08-27 15:54:06 +02:00 |
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Gregor Riepl
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9f2054453d
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Generate a PRG file
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2022-08-22 19:00:42 +02:00 |
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Gregor Riepl
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9c71e8bbb0
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Write state to unused tape buffer
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2022-08-20 20:31:48 +02:00 |
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Gregor Riepl
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c5a211a8f0
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Reconfig memory
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2022-08-20 17:37:42 +02:00 |
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Gregor Riepl
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523c4c6dea
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Implement RX
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2022-08-20 11:11:47 +02:00 |
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Gregor Riepl
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14cff310b7
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Custom memory config
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2022-08-19 22:38:18 +02:00 |
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Gregor Riepl
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83cfce2960
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Use VIA T2, implment output
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2022-08-19 15:03:38 +02:00 |
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Gregor Riepl
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4a6e099f5f
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Added base driver code without bit transfer
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2022-08-13 20:45:08 +02:00 |
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